seg70.sim.rpt

CPLD开发板VHDL源程序并附上开发板的原理图

; |seg70|Mux7~100     ; |seg70|Mux7~100                 ; combout          ;
; |seg70|Mux7~101     ; |seg70|Mux7~101                 ; combout          ;
; |seg70|cnt_scan[12] ; |seg70|cnt_scan[12]~73          ; cout             ;
; |seg70|cnt_scan[11] ; |seg70|cnt_scan[11]~74          ; cout0            ;
; |seg70|cnt_scan[11] ; |seg70|cnt_scan[11]~74COUT1_115 ; cout1            ;
; |seg70|cnt_scan[10] ; |seg70|cnt_scan[10]~75          ; cout0            ;
; |seg70|cnt_scan[10] ; |seg70|cnt_scan[10]~75COUT1_113 ; cout1            ;
; |seg70|cnt_scan[9]  ; |seg70|cnt_scan[9]~76           ; cout0            ;
; |seg70|cnt_scan[9]  ; |seg70|cnt_scan[9]~76COUT1_111  ; cout1            ;
; |seg70|cnt_scan[8]  ; |seg70|cnt_scan[8]~77           ; cout0            ;
; |seg70|cnt_scan[8]  ; |seg70|cnt_scan[8]~77COUT1_109  ; cout1            ;
; |seg70|cnt_scan[7]  ; |seg70|cnt_scan[7]~78           ; cout             ;
; |seg70|cnt_scan[6]  ; |seg70|cnt_scan[6]~79           ; cout0            ;
; |seg70|cnt_scan[6]  ; |seg70|cnt_scan[6]~79COUT1_107  ; cout1            ;
; |seg70|cnt_scan[5]  ; |seg70|cnt_scan[5]~80           ; cout0            ;
; |seg70|cnt_scan[5]  ; |seg70|cnt_scan[5]~80COUT1_105  ; cout1            ;
; |seg70|cnt_scan[4]  ; |seg70|cnt_scan[4]~81           ; cout0            ;
; |seg70|cnt_scan[4]  ; |seg70|cnt_scan[4]~81COUT1_103  ; cout1            ;
; |seg70|cnt_scan[3]  ; |seg70|cnt_scan[3]~82           ; cout0            ;
; |seg70|cnt_scan[3]  ; |seg70|cnt_scan[3]~82COUT1_101  ; cout1            ;
; |seg70|cnt_scan[2]  ; |seg70|cnt_scan[2]~83           ; cout             ;
; |seg70|cnt_scan[1]  ; |seg70|cnt_scan[1]~84           ; cout0            ;
; |seg70|cnt_scan[1]  ; |seg70|cnt_scan[1]~84COUT1_99   ; cout1            ;
; |seg70|cnt_scan[0]  ; |seg70|cnt_scan[0]              ; regout           ;
; |seg70|rst          ; |seg70|rst~corein               ; combout          ;
; |seg70|dataout[0]   ; |seg70|dataout[0]               ; padio            ;
; |seg70|dataout[1]   ; |seg70|dataout[1]               ; padio            ;
; |seg70|dataout[2]   ; |seg70|dataout[2]               ; padio            ;
; |seg70|dataout[3]   ; |seg70|dataout[3]               ; padio            ;
; |seg70|dataout[4]   ; |seg70|dataout[4]               ; padio            ;
; |seg70|dataout[5]   ; |seg70|dataout[5]               ; padio            ;
; |seg70|dataout[6]   ; |seg70|dataout[6]               ; padio            ;
; |seg70|dataout[7]   ; |seg70|dataout[7]               ; padio            ;
; |seg70|en[0]        ; |seg70|en[0]                    ; padio            ;
; |seg70|en[1]        ; |seg70|en[1]                    ; padio            ;
; |seg70|en[2]        ; |seg70|en[2]                    ; padio            ;
; |seg70|en[3]        ; |seg70|en[3]                    ; padio            ;
; |seg70|en[4]        ; |seg70|en[4]                    ; padio            ;
; |seg70|en[5]        ; |seg70|en[5]                    ; padio            ;
; |seg70|en[6]        ; |seg70|en[6]                    ; padio            ;
; |seg70|en[7]        ; |seg70|en[7]                    ; padio            ;
+---------------------+---------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                 ;
+---------------------+---------------------------------+------------------+
; Node Name           ; Output Port Name                ; Output Port Type ;
+---------------------+---------------------------------+------------------+
; |seg70|cnt_scan[13] ; |seg70|cnt_scan[13]~70          ; cout0            ;
; |seg70|cnt_scan[13] ; |seg70|cnt_scan[13]~70COUT1_117 ; cout1            ;
; |seg70|cnt_scan[14] ; |seg70|cnt_scan[14]~71          ; cout0            ;
; |seg70|cnt_scan[14] ; |seg70|cnt_scan[14]~71COUT1_119 ; cout1            ;
; |seg70|Mux18~43     ; |seg70|Mux18~43                 ; combout          ;
; |seg70|Mux17~106    ; |seg70|Mux17~106                ; combout          ;
; |seg70|Mux16~27     ; |seg70|Mux16~27                 ; combout          ;
; |seg70|Mux15~70     ; |seg70|Mux15~70                 ; combout          ;
; |seg70|Mux7~94      ; |seg70|Mux7~94                  ; combout          ;
; |seg70|Mux13~21     ; |seg70|Mux13~21                 ; combout          ;
; |seg70|Mux12~45     ; |seg70|Mux12~45                 ; combout          ;
; |seg70|Mux7~95      ; |seg70|Mux7~95                  ; combout          ;
; |seg70|Mux7~96      ; |seg70|Mux7~96                  ; combout          ;
; |seg70|Mux7~97      ; |seg70|Mux7~97                  ; combout          ;
; |seg70|Mux7~98      ; |seg70|Mux7~98                  ; combout          ;
; |seg70|Mux7~99      ; |seg70|Mux7~99                  ; combout          ;
; |seg70|Mux7~100     ; |seg70|Mux7~100                 ; combout          ;
; |seg70|Mux7~101     ; |seg70|Mux7~101                 ; combout          ;
; |seg70|cnt_scan[12] ; |seg70|cnt_scan[12]~73          ; cout             ;
; |seg70|cnt_scan[11] ; |seg70|cnt_scan[11]~74          ; cout0            ;
; |seg70|cnt_scan[11] ; |seg70|cnt_scan[11]~74COUT1_115 ; cout1            ;
; |seg70|cnt_scan[10] ; |seg70|cnt_scan[10]~75          ; cout0            ;
; |seg70|cnt_scan[10] ; |seg70|cnt_scan[10]~75COUT1_113 ; cout1            ;
; |seg70|cnt_scan[9]  ; |seg70|cnt_scan[9]~76           ; cout0            ;
; |seg70|cnt_scan[9]  ; |seg70|cnt_scan[9]~76COUT1_111  ; cout1            ;
; |seg70|cnt_scan[8]  ; |seg70|cnt_scan[8]~77           ; cout0            ;
; |seg70|cnt_scan[8]  ; |seg70|cnt_scan[8]~77COUT1_109  ; cout1            ;
; |seg70|cnt_scan[7]  ; |seg70|cnt_scan[7]~78           ; cout             ;
; |seg70|cnt_scan[6]  ; |seg70|cnt_scan[6]~79           ; cout0            ;
; |seg70|cnt_scan[6]  ; |seg70|cnt_scan[6]~79COUT1_107  ; cout1            ;
; |seg70|cnt_scan[5]  ; |seg70|cnt_scan[5]~80           ; cout0            ;
; |seg70|cnt_scan[5]  ; |seg70|cnt_scan[5]~80COUT1_105  ; cout1            ;
; |seg70|cnt_scan[4]  ; |seg70|cnt_scan[4]~81           ; cout0            ;
; |seg70|cnt_scan[4]  ; |seg70|cnt_scan[4]~81COUT1_103  ; cout1            ;
; |seg70|cnt_scan[3]  ; |seg70|cnt_scan[3]~82           ; cout0            ;
; |seg70|cnt_scan[3]  ; |seg70|cnt_scan[3]~82COUT1_101  ; cout1            ;
; |seg70|cnt_scan[2]  ; |seg70|cnt_scan[2]~83           ; cout             ;
; |seg70|cnt_scan[1]  ; |seg70|cnt_scan[1]~84           ; cout0            ;
; |seg70|cnt_scan[1]  ; |seg70|cnt_scan[1]~84COUT1_99   ; cout1            ;
; |seg70|cnt_scan[0]  ; |seg70|cnt_scan[0]              ; regout           ;
; |seg70|rst          ; |seg70|rst~corein               ; combout          ;
; |seg70|dataout[0]   ; |seg70|dataout[0]               ; padio            ;
; |seg70|dataout[1]   ; |seg70|dataout[1]               ; padio            ;
; |seg70|dataout[2]   ; |seg70|dataout[2]               ; padio            ;
; |seg70|dataout[3]   ; |seg70|dataout[3]               ; padio            ;
; |seg70|dataout[4]   ; |seg70|dataout[4]               ; padio            ;
; |seg70|dataout[5]   ; |seg70|dataout[5]               ; padio            ;
; |seg70|dataout[6]   ; |seg70|dataout[6]               ; padio            ;
; |seg70|dataout[7]   ; |seg70|dataout[7]               ; padio            ;
; |seg70|en[0]        ; |seg70|en[0]                    ; padio            ;
; |seg70|en[1]        ; |seg70|en[1]                    ; padio            ;
; |seg70|en[2]        ; |seg70|en[2]                    ; padio            ;
; |seg70|en[3]        ; |seg70|en[3]                    ; padio            ;
; |seg70|en[4]        ; |seg70|en[4]                    ; padio            ;
; |seg70|en[5]        ; |seg70|en[5]                    ; padio            ;
; |seg70|en[6]        ; |seg70|en[6]                    ; padio            ;
; |seg70|en[7]        ; |seg70|en[7]                    ; padio            ;
+---------------------+---------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
    Info: Processing started: Sat Oct 11 21:22:39 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off seg70 -c seg70
Info: Using vector source file "F:/学习文件/EDA资料/CPLD开发板VHDL源程序并附上开发板的原理图/VHDL_Development_Board_Sources/接口实验/7段数码管/seg70/seg70.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is       1.72 %
Info: Number of transitions in simulation is 199
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Allocated 97 megabytes of memory during processing
    Info: Processing ended: Sat Oct 11 21:22:40 2008
    Info: Elapsed time: 00:00:01