i2c.tan.qmsg

CPLD开发板VHDL源程序并附上开发板的原理图

{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "i2c.vhd" "" { Text "G:/work_room/PLD/Mars-7128-S Altera CPLD开发板/示例程序/VHDL/接口实验/i2c总线/i2c.vhd" 15 -1 0 } } { "c:/altera/quartus501/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus501/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0}  } {  } 0}