lcd.fit.summary

CPLD开发板VHDL源程序并附上开发板的原理图

Fitter Status : Successful - Sat Oct 11 20:56:14 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : lcd
Top-level Entity Name : lcd
Family : MAX II
Device : EPM240T100C5
Timing Models : Final
Total logic elements : 139 / 240 ( 58 % )
Total pins : 14 / 80 ( 18 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )