lcd.qsf

CPLD开发板VHDL源程序并附上开发板的原理图

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		lcd_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:24:40  APRIL 11, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 7.1
set_global_assignment -name GDF_FILE clklogic.gdf
set_global_assignment -name VHDL_FILE lcd.vhd
set_global_assignment -name VHDL_FILE char_ram.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE lcd.vwf

# Pin & Location Assignments
# ==========================

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY lcd

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM240T100C5
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 0

# Assembler Assignments
# =====================

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name SETUP_HOLD_DETECTION OFF
set_global_assignment -name CHECK_OUTPUTS OFF
set_global_assignment -name GLITCH_INTERVAL "1 ns"
set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE OFF

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF