dial2.map.summary

CPLD开发板VHDL源程序并附上开发板的原理图

Flow Status : Successful - Thu Apr 20 16:01:43 2006
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : dial2
Top-level Entity Name : dial2
Family : MAX7000S
Device : EPM7128SLC84-15
Timing Models : Final
Met timing requirements : N/A
Total macrocells : 36
Total pins : 26