sc_fib.cpp

在SystemC下编的fibonicii 的程序

// All systemc modules should include systemc.h header file
#include <systemc.h>

SC_MODULE (sc_fib){
	// input ports
	sc_in	<bool>			clk;			//	clock input of the design
	sc_in	<bool>			reset;			//	active high, synchronous Reset input
	sc_in	<bool>			enable;			//	active high enable signal for counter
	sc_in	<bool>			up_down;		//	up/down function select
	sc_in	<bool>			manual_auto;	//	manual/auto select
	sc_in	<bool>			preset;			//	zorgt voor een bepaalde preset waarde
	sc_in	<bool>			Next;			//	next value
	sc_in	<bool>			prev1	;			//	previos one
	sc_in	<bool>			prev2	;			//	previos two

	// output ports
	sc_out	<sc_uint<16>>	counter_out;	//	32 bit vector output of fibonacci counter

	// local variables here
	sc_uint<16>			count;
	sc_uint<16>			in;					// input of the fibonacci module

	// code starts here
	// below function implements actual counter logic
	void counter(){
		// at every rising edge of clock, we check if reset is active
		// if active, we load the counter output with 8 bit 'b000000000000000000000000'
		if (reset.read() == 1){
			count = 0;
		}
		else if(preset.read() == 1){		//reset has prioroty on the preset
			count = 5;
		}
											// if enable is active, then we enable the counting
		if (enable.read() == 1 && reset.read() != 1){
			if(manual_auto.read() == 0){
				if (up_down.read() == 1){
										count = count + 1;										
				}
				else {
										count = count - 1;
				}
			}
			counter_out.write(fib(count));
			if(manual_auto.read() == 1 ){
				if(Next.read()==1 && up_down.read() == 1) {
					count = count + 1;		//krijgen 1ste prioriteit
					counter_out.write(fib(count));
				}
				else if(Next.read()==1 && up_down.read() == 0){
					count = count - 1;
					counter_out.write(fib(count));
				}
				else if (prev1.read()==1) {
					count = count - 1;
					counter_out.write(fib(count));
					count = count + 1;
				}					
					
				else if (prev2.read()==1) {
					count = count - 2;
					counter_out.write(fib(count));
					count = count + 2;
				}	
			}
			
		} 
	}	// End of function counter
	
	sc_uint<16> fib(sc_uint<16> in){
		
		if(in == 1 || in <= 0) return 1;
		else return (fib(in-1)+fib(in-2));
	}	

	// module constructor
	SC_CTOR (sc_fib){
		SC_METHOD (counter);
		sensitive << reset;
		sensitive << preset;
		sensitive << clk.pos();		//is clk triggerd
	} // End of constructor
};