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This a FREE tool chain which compiles C codes into 8051 binary code, converts the binary to RTL ROM,

                                ASxxxx Assemblers


                                       and


                            ASLINK Relocating Linker


        CHAPTER 1  THE ASSEMBLER                                     1-1
          1.1     THE ASXXXX ASSEMBLERS                              1-1
          1.1.1     Assembly Pass 1                                  1-2
          1.1.2     Assembly Pass 2                                  1-2
          1.1.3     Assembly Pass 3                                  1-2
          1.2     SOURCE PROGRAM FORMAT                              1-3
          1.2.1     Statement Format                                 1-3
          1.2.1.1     Label Field                                    1-3
          1.2.1.2     Operator Field                                 1-5
          1.2.1.3     Operand Field                                  1-5
          1.2.1.4     Comment Field                                  1-6
          1.3     SYMBOLS AND EXPRESSIONS                            1-6
          1.3.1     Character Set                                    1-6
          1.3.2     User-Defined Symbols                            1-10
          1.3.3     Local Symbols                                   1-11
          1.3.4     Current Location Counter                        1-12
          1.3.5     Numbers                                         1-14
          1.3.6     Terms                                           1-14
          1.3.7     Expressions                                     1-15
          1.4     GENERAL ASSEMBLER DIRECTIVES                      1-16
          1.4.1     .module Directive                               1-16
          1.4.2     .title Directive                                1-17
          1.4.3     .sbttl Directive                                1-17
          1.4.4     .page Directive                                 1-17
          1.4.5     .byte and .db Directives                        1-17
          1.4.6     .word and .dw Directives                        1-18
          1.4.7     .blkb, .blkw, and .ds Directives                1-18
          1.4.8     .ascii Directive                                1-18
          1.4.9     .ascis Directive                                1-19
          1.4.10    .asciz Directive                                1-19
          1.4.11    .radix Directive                                1-20
          1.4.12    .even Directive                                 1-20
          1.4.13    .odd Directive                                  1-20
          1.4.14    .area Directive                                 1-21
          1.4.15    .org Directive                                  1-22
          1.4.16    .globl Directive                                1-23
          1.4.17    .if, .else, and .endif Directives               1-23
          1.4.18    .include Directive                              1-24
          1.4.19    .setdp Directive                                1-25
          1.5     INVOKING ASXXXX                                   1-27
          1.6     ERRORS                                            1-28
          1.7     LISTING FILE                                      1-29
          1.8     SYMBOL TABLE FILE                                 1-30
          1.9     OBJECT FILE                                       1-31

        CHAPTER 2  THE LINKER                                        2-1
          2.1     ASLINK RELOCATING LINKER                           2-1
          2.2     INVOKING ASLINK                                    2-2
          2.3     LIBRARY PATH(S) AND FILE(S)                        2-3
          2.4     ASLINK PROCESSING                                  2-4
          2.5     LINKER INPUT FORMAT                                2-5
          2.5.1     Object Module Format                             2-6
          2.5.2     Header Line                                      2-6
          2.5.3     Module Line                                      2-6
          2.5.4     Symbol Line                                      2-6
          2.5.5     Area Line                                        2-7


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          2.5.6     T Line                                           2-7
          2.5.7     R Line                                           2-7
          2.5.8     P Line                                           2-8
          2.6     LINKER ERROR MESSAGES                              2-8
          2.7     INTEL HEX OUTPUT FORMAT                           2-11
          2.8     MOTORLA S1-S9 OUTPUT FORMAT                       2-12

        CHAPTER 3  BUILDING ASXXXX AND ASLINK                        3-1
          3.1     BUILDING AN ASSEMBLER                              3-1
          3.2     BUILDING ASLINK                                    3-2

        APPENDIX A  AS6800 ASSEMBLER                                 A-1
          A.1     6800 REGISTER SET                                  A-1
          A.2     6800 INSTRUCTION SET                               A-1
          A.2.1     Inherent Instructions                            A-2
          A.2.2     Branch Instructions                              A-2
          A.2.3     Single Operand Instructions                      A-3
          A.2.4     Double Operand Instructions                      A-4
          A.2.5     Jump and Jump to Subroutine Instructions         A-4
          A.2.6     Long Register Instructions                       A-5

        APPENDIX B  AS6801 ASSEMBLER                                 B-1
          B.1     .hd6303 DIRECTIVE                                  B-1
          B.2     6801 REGISTER SET                                  B-1
          B.3     6801 INSTRUCTION SET                               B-1
          B.3.1     Inherent Instructions                            B-2
          B.3.2     Branch Instructions                              B-2
          B.3.3     Single Operand Instructions                      B-3
          B.3.4     Double Operand Instructions                      B-4
          B.3.5     Jump and Jump to Subroutine Instructions         B-5
          B.3.6     Long Register Instructions                       B-5
          B.3.7     6303 Specific Instructions                       B-5

        APPENDIX C  AS6804 ASSEMBLER                                 C-1
          C.1     6804 REGISTER SET                                  C-1
          C.2     6804 INSTRUCTION SET                               C-1
          C.2.1     Inherent Instructions                            C-2
          C.2.2     Branch Instructions                              C-2
          C.2.3     Single Operand Instructions                      C-2
          C.2.4     Jump and Jump to Subroutine Instructions         C-2
          C.2.5     Bit Test Instructions                            C-2
          C.2.6     Load Immediate data Instruction                  C-3
          C.2.7     6804 Derived Instructions                        C-3

        APPENDIX D  AS6805 ASSEMBLER                                 D-1
          D.1     6805 REGISTER SET                                  D-1
          D.2     6805 INSTRUCTION SET                               D-1
          D.2.1     Control Instructions                             D-2
          D.2.2     Bit Manipulation Instructions                    D-2
          D.2.3     Branch Instructions                              D-2
          D.2.4     Read-Modify-Write Instructions                   D-3
          D.2.5     Register\Memory Instructions                     D-3


                                                                Page iii



          D.2.6     Jump and Jump to Subroutine Instructions         D-4

        APPENDIX E  AS68HC08 ASSEMBLER                               E-1
          E.1     68HC08 REGISTER SET                                E-1
          E.2     68HC08 INSTRUCTION SET                             E-1
          E.2.1     Control Instructions                             E-2
          E.2.2     Bit Manipulation Instructions                    E-2
          E.2.3     Branch Instructions                              E-3
          E.2.4     Complex Branch Instructions                      E-3
          E.2.5     Read-Modify-Write Instructions                   E-4
          E.2.6     Register\Memory Instructions                     E-5
          E.2.7     Double Operand Move Instruction                  E-5
          E.2.8     16-Bit <H:X> Index Register Instructions         E-5
          E.2.9     Jump and Jump to Subroutine Instructions         E-5

        APPENDIX F  AS6809 ASSEMBLER                                 F-1
          F.1     6809 REGISTER SET                                  F-1
          F.2     6809 INSTRUCTION SET                               F-1
          F.2.1     Inherent Instructions                            F-3
          F.2.2     Short Branch Instructions                        F-3
          F.2.3     Long Branch Instructions                         F-3
          F.2.4     Single Operand Instructions                      F-4
          F.2.5     Double Operand Instructions                      F-5
          F.2.6     D-register Instructions                          F-5
          F.2.7     Index/Stack Register Instructions                F-5
          F.2.8     Jump and Jump to Subroutine Instructions         F-6
          F.2.9     Register - Register Instructions                 F-6
          F.2.10    Condition Code Register Instructions             F-6
          F.2.11    6800 Compatibility Instructions                  F-6

        APPENDIX G  AS6811 ASSEMBLER                                 G-1
          G.1     6811 REGISTER SET                                  G-1
          G.2     6811 INSTRUCTION SET                               G-1
          G.2.1     Inherent Instructions                            G-2
          G.2.2     Branch Instructions                              G-2
          G.2.3     Single Operand Instructions                      G-3
          G.2.4     Double Operand Instructions                      G-4
          G.2.5     Bit Manupulation Instructions                    G-4
          G.2.6     Jump and Jump to Subroutine Instructions         G-5
          G.2.7     Long Register Instructions                       G-5

        APPENDIX H  AS6816 ASSEMBLER                                 H-1
          H.1     6816 REGISTER SET                                  H-1
          H.2     6816 INSTRUCTION SET                               H-1
          H.2.1     Inherent Instructions                            H-2
          H.2.2     Push/Pull Multiple Register Instructions         H-3
          H.2.3     Short Branch Instructions                        H-3
          H.2.4     Long Branch Instructions                         H-3
          H.2.5     Bit Manipulation Instructions                    H-3
          H.2.6     Single Operand Instructions                      H-4
          H.2.7     Double Operand Instructions                      H-5
          H.2.8     Index/Stack Register Instructions                H-5


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          H.2.9     Jump and Jump to Subroutine Instructions         H-6
          H.2.10    Condition Code Register Instructions             H-6
          H.2.11    Multiply and Accumulate Instructions             H-6

        APPENDIX I  ASH8 ASSEMBLER                                   I-1
          I.1     H8/3XX REGISTER SET                                I-1
          I.2     H8/3XX INSTRUCTION SET                             I-1
          I.2.1     Inherent Instructions                            I-2
          I.2.2     Branch Instructions                              I-2
          I.2.3     Single Operand Instructions                      I-3
          I.2.4     Double Operand Instructions                      I-4
          I.2.5     Mov Instructions                                 I-5
          I.2.6     Bit Manipulation Instructions                    I-6
          I.2.7     Extended Bit Manipulation Instructions           I-7
          I.2.8     Condition Code Instructions                      I-7
          I.2.9     Other Instructions                               I-8
          I.2.10    Jump and Jump to Subroutine Instructions         I-8

        APPENDIX J  AS8085 ASSEMBLER                                 J-1
          J.1     8085 REGISTER SET                                  J-1
          J.2     8085 INSTRUCTION SET                               J-1
          J.2.1     Inherent Instructions                            J-2
          J.2.2     Register/Memory/Immediate Instructions           J-2
          J.2.3     Call and Return Instructions                     J-2
          J.2.4     Jump Instructions                                J-2
          J.2.5     Input/Output/Reset Instructions                  J-3
          J.2.6     Move Instructions                                J-3
          J.2.7     Other Instructions                               J-3

        APPENDIX K  ASZ80 ASSEMBLER                                  K-1
          K.1     .hd64 DIRECTIVE                                    K-1
          K.2     Z80 REGISTER SET AND CONDITIONS                    K-1
          K.3     Z80 INSTRUCTION SET                                K-2
          K.3.1     Inherent Instructions                            K-3
          K.3.2     Implicit Operand Instructions                    K-3
          K.3.3     Load Instruction                                 K-4
          K.3.4     Call/Return Instructions                         K-4
          K.3.5     Jump and Jump to Subroutine Instructions         K-4
          K.3.6     Bit Manipulation Instructions                    K-5
          K.3.7     Interrupt Mode and Reset Instructions            K-5
          K.3.8     Input and Output Instructions                    K-5
          K.3.9     Register Pair Instructions                       K-5
          K.3.10    HD64180 Specific Instructions                    K-6

        APPENDIX L  AS6500 ASSEMBLER                                 L-1
          L.1     ACKNOWLEDGMENT                                     L-1
          L.2     6500 REGISTER SET                                  L-2
          L.3     6500 INSTRUCTION SET                               L-2
          L.3.1     Processor Specific Directives                    L-3
          L.3.2     65xx Core Inherent Instructions                  L-3
          L.3.3     65xx Core Branch Instructions                    L-3
          L.3.4     65xx Core Single Operand Instructions            L-3


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          L.3.5     65xx Core Double Operand Instructions            L-4
          L.3.6     65xx Core Jump and Jump to Subroutine
                    Instructions                                     L-4
          L.3.7     65xx Core Miscellaneous X and Y Register
                    Instructions                                     L-4
          L.3.8     65F11 and 65F12 Specific Instructions            L-5
          L.3.9     65C00/21 and 65C29 Specific Instructions         L-5
          L.3.10    65C02, 65C102, and 65C112 Specific
                    Instructions                                     L-6


                                                                 Page vi



        ASxxxx Cross Assemblers, Version 1.7

        Submitted by:
        Alan R.  Baldwin,
        Physics Dept.
        Kent State University
        Kent, Ohio 44242

        Operating System:  TSX+, RT-11, PDOS, MS/DOS, Windows 3.x
        or other supporting K&R C.

        Source Langauge:  C

           The ASxxxx Cross Assembler and Linker package (V1.7 November
        1995) contains cross assemblers for the 6800(6802/6808),
        6801(hd6303), 6804, 6805, 68HC08, 6809, 6811, 68HC16,
        8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces-
        sors.  Complete source code is provided with the assem-
        bler/linker submission.





           The ASxxxx Cross Assembler and Linker package is available
        from Kent State University at shop-pdp.kent.edu by "anonymous"
        FTP.


                                                                Page vii








                                  P R E F A C E





           The  ASxxxx  assemblers  were  written following the style of