serial.fit.eqn

一些Verilog学习程序B

--A1L331 is txd_buf[2]~432 at LC56
A1L331_p0_out = txd_buf[2] & !state_tras[1] & !state_tras[3] & !state_tras[2] & !state_tras[0];
A1L331_p1_out = !key_entry2 & key_entry1;
A1L331_p2_out = txd_buf[2] & !key_entry2;
A1L331_p3_out = txd_buf[2] & state_tras[1] & state_tras[3] & !state_tras[0];
A1L331_p4_out = txd_buf[2] & state_tras[3] & state_tras[2] & !state_tras[0];
A1L331 = A1L331_p0_out # A1L331_p1_out # A1L331_p2_out # A1L331_p3_out # A1L331_p4_out;


--A1L431 is txd_buf[2]~438 at LC57
A1L431_p0_out = !state_tras[1] & state_tras[3] & !state_tras[2] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & txd_buf[3];
A1L431_p1_out = state_tras[0] & !state_tras[1] & state_tras[3] & txd_buf[2];
A1L431_p2_out = state_tras[0] & !state_tras[3] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & txd_buf[3];
A1L431_p3_out = state_tras[1] & !state_tras[3] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & txd_buf[3];
A1L431_p4_out = !state_tras[3] & state_tras[2] & key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & txd_buf[3];
A1L431 = A1L331 # A1L431_p0_out # A1L431_p1_out # A1L431_p2_out # A1L431_p3_out # A1L431_p4_out;


--A1L531 is txd_buf[2]~444 at LC58
A1L531_p0_out = state_tras[3] & state_tras[2] & txd_buf[2] & !send_state[2] & send_state[0];
A1L531_p1_out = !state_tras[1] & txd_buf[3] & txd_buf[2];
A1L531_p2_out = key_entry2 & state_tras[1] & state_tras[3] & state_tras[2] & state_tras[0] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !send_state[1];
A1L531_p3_out = key_entry2 & state_tras[1] & state_tras[3] & state_tras[2] & state_tras[0] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !send_state[2] & send_state[0];
A1L531_p4_out = key_entry2 & !state_tras[1] & state_tras[3] & !state_tras[2] & state_tras[0] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L531 = A1L431 # A1L531_p0_out # A1L531_p1_out # A1L531_p2_out # A1L531_p3_out # A1L531_p4_out;


--A1L131 is txd_buf[1]~450 at LC49
A1L131_p0_out = txd_buf[1] & state_tras[1] & state_tras[3] & !state_tras[2];
A1L131_p1_out = txd_buf[2] & !state_tras[0] & txd_buf[1];
A1L131_p2_out = txd_buf[2] & !state_tras[0] & key_entry2 & !state_tras[1] & state_tras[3] & !state_tras[2] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L131_p3_out = state_tras[0] & key_entry2 & state_tras[1] & state_tras[3] & state_tras[2] & !send_state[2] & send_state[1] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1];
A1L131_p4_out = !state_tras[0] & txd_buf[1] & !state_tras[1] & !state_tras[3] & !state_tras[2];
A1L131 = A1L131_p0_out # A1L131_p1_out # A1L131_p2_out # A1L131_p3_out # A1L131_p4_out;


--A1L551 is txd_reg~71 at LC42
A1L551_p1_out = !state_tras[2] & !state_tras[3] & !txd_reg & !state_tras[1] & !state_tras[0];
A1L551_p2_out = !state_tras[2] & state_tras[3] & !state_tras[1] & !state_tras[0] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !txd_buf[0] & key_entry2;
A1L551_p3_out = !txd_reg & A1L451;
A1L551 = A1L551_p1_out # A1L551_p2_out # A1L551_p3_out;


--~GND~9 is ~GND~9 at LC118
~GND~9_or_out = GND;
~GND~9 = ~GND~9_or_out;


--~GND~10 is ~GND~10 at LC117
~GND~10_or_out = GND;
~GND~10 = ~GND~10_or_out;


--~GND~11 is ~GND~11 at LC115
~GND~11_or_out = GND;
~GND~11 = ~GND~11_or_out;


--~GND~12 is ~GND~12 at LC109
~GND~12_or_out = GND;
~GND~12 = ~GND~12_or_out;


--~GND~13 is ~GND~13 at LC107
~GND~13_or_out = GND;
~GND~13 = ~GND~13_or_out;


--~GND~14 is ~GND~14 at LC105
~GND~14_or_out = GND;
~GND~14 = ~GND~14_or_out;


--~GND~15 is ~GND~15 at LC104
~GND~15_or_out = GND;
~GND~15 = ~GND~15_or_out;


--~GND~16 is ~GND~16 at LC101
~GND~16_or_out = GND;
~GND~16 = ~GND~16_or_out;


--~VCC~1 is ~VCC~1 at LC94
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~GND~17 is ~GND~17 at LC37
~GND~17_or_out = GND;
~GND~17 = ~GND~17_or_out;


--A1L15 is reduce_nor~133sexp at SEXP17
A1L15 = EXP(C1_dffs[1] & C1_dffs[0] & !C1_dffs[13] & !C1_dffs[15] & !C1_dffs[12] & C1_dffs[8] & !C1_dffs[3] & !C1_dffs[10] & !C1_dffs[4] & !C1_dffs[5] & !C1_dffs[2] & !C1_dffs[9] & !C1_dffs[6] & !C1_dffs[7] & !C1_dffs[11] & !C1_dffs[14]);


--A1L25 is reduce_nor~136sexp at SEXP1
A1L25 = EXP(!cnt_delay[4] & !cnt_delay[5] & !cnt_delay[0] & !cnt_delay[7] & !cnt_delay[15] & !cnt_delay[17] & !cnt_delay[9] & !cnt_delay[1] & !cnt_delay[6] & !cnt_delay[14] & !cnt_delay[2] & !cnt_delay[16] & !cnt_delay[3] & !cnt_delay[11] & cnt_delay[19] & cnt_delay[10] & cnt_delay[13] & cnt_delay[12] & cnt_delay[8] & cnt_delay[18]);


--A1L35 is reduce_nor~138sexp at SEXP62
A1L35 = EXP(div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1]);


--A1L57 is rtl~4800sexp1 at SEXP63
A1L57 = EXP(txd_buf[1] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[0]);


--A1L67 is rtl~4800sexp2 at SEXP64
A1L67 = EXP(txd_buf[1] & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1] & !state_tras[3]);


--A1L87 is rtl~4810 at LC121
A1L87_p1_out = state_tras[1] & !state_tras[3] & key_entry2;
A1L87_p2_out = !state_tras[3] & key_entry2 & state_tras[0];
A1L87 = A1L87_p1_out # A1L87_p2_out;


--A1L321 is trasstart~46bal at LC128
A1L321_p1_out = send_state[2] & send_state[0] & send_state[1];
A1L321_or_out = A1L321_p1_out;
A1L321 = !(A1L321_or_out);


--rst is rst at PIN_1
--operation mode is input

rst = INPUT();


--clk is clk at PIN_83
--operation mode is input

clk = INPUT();


--key_input is key_input at PIN_35
--operation mode is input

key_input = INPUT();


--rxd is rxd at PIN_25
--operation mode is input

rxd = INPUT();


--en[0] is en[0] at PIN_75
--operation mode is output

en[0] = OUTPUT(~GND~9);


--en[1] is en[1] at PIN_74
--operation mode is output

en[1] = OUTPUT(~GND~10);


--en[2] is en[2] at PIN_73
--operation mode is output

en[2] = OUTPUT(~GND~11);


--en[3] is en[3] at PIN_70
--operation mode is output

en[3] = OUTPUT(~GND~12);


--en[4] is en[4] at PIN_69
--operation mode is output

en[4] = OUTPUT(~GND~13);


--en[5] is en[5] at PIN_68
--operation mode is output

en[5] = OUTPUT(~GND~14);


--en[6] is en[6] at PIN_67
--operation mode is output

en[6] = OUTPUT(~GND~15);


--en[7] is en[7] at PIN_65
--operation mode is output

en[7] = OUTPUT(~GND~16);


--seg_data[0] is seg_data[0] at PIN_61
--operation mode is output

seg_data[0] = OUTPUT(~VCC~1);


--lowbit is lowbit at PIN_30
--operation mode is output

lowbit = OUTPUT(~GND~17);


--seg_data[1] is seg_data[1] at PIN_64
--operation mode is output

seg_data[1] = OUTPUT(A1L65);


--seg_data[4] is seg_data[4] at PIN_60
--operation mode is output

seg_data[4] = OUTPUT(A1L75);


--seg_data[5] is seg_data[5] at PIN_63
--operation mode is output

seg_data[5] = OUTPUT(A1L95);


--seg_data[6] is seg_data[6] at PIN_55
--operation mode is output

seg_data[6] = OUTPUT(A1L16);


--seg_data[7] is seg_data[7] at PIN_57
--operation mode is output

seg_data[7] = OUTPUT(A1L26);


--seg_data[2] is seg_data[2] at PIN_56
--operation mode is output

seg_data[2] = OUTPUT(A1L66);


--seg_data[3] is seg_data[3] at PIN_58
--operation mode is output

seg_data[3] = OUTPUT(A1L96);


--txd is txd at PIN_27
--operation mode is output

txd = OUTPUT(txd_reg);






--A1L17 is reduce_or~5305 at SEXP81
A1L17 = EXP(rxd_buf[0] & rxd_buf[2]);


--A1L521 is trasstart~54 at SEXP115
A1L521 = EXP(state_tras[0] & state_tras[1]);


--A1L621 is trasstart~55 at SEXP51
A1L621 = EXP(state_tras[0] & state_tras[1]);


--A1L841 is txd_buf[5]~456 at SEXP53
A1L841 = EXP(key_entry2 & div8_tras_reg[2] & div8_tras_reg[0] & div8_tras_reg[1]);


--A1L941 is txd_buf[5]~457 at SEXP33
A1L941 = EXP(!state_tras[2] & !state_tras[1] & !state_tras[0]);


--A1L241 is txd_buf[4]~458 at SEXP34
A1L241 = EXP(!state_tras[1] & !state_tras[2]);


--A1L051 is txd_buf[5]~459 at SEXP117
A1L051 = EXP(!state_tras[2] & !state_tras[1] & !state_tras[0]);