📄 encode.tan.rpt
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Timing Analyzer report for encode
Sun Jan 11 20:43:50 2009
Version 6.0 Build 178 04/27/2006 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. tpd
5. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Worst-case tpd ; N/A ; None ; 10.788 ns ; a[2] ; c[7] ; -- ; -- ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EPM240T100C5 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Default hold multicycle ; Same As Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; Off ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+-----------------------------------------------------------+
; tpd ;
+-------+-------------------+-----------------+------+------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+------+------+
; N/A ; None ; 10.788 ns ; a[2] ; c[7] ;
; N/A ; None ; 10.784 ns ; a[4] ; c[7] ;
; N/A ; None ; 10.781 ns ; a[2] ; c[4] ;
; N/A ; None ; 10.770 ns ; a[4] ; c[3] ;
; N/A ; None ; 10.768 ns ; a[2] ; c[3] ;
; N/A ; None ; 10.764 ns ; a[2] ; c[2] ;
; N/A ; None ; 10.761 ns ; a[4] ; c[2] ;
; N/A ; None ; 10.620 ns ; a[3] ; c[7] ;
; N/A ; None ; 10.613 ns ; a[3] ; c[4] ;
; N/A ; None ; 10.600 ns ; a[3] ; c[3] ;
; N/A ; None ; 10.596 ns ; a[3] ; c[2] ;
; N/A ; None ; 10.504 ns ; a[6] ; c[7] ;
; N/A ; None ; 10.497 ns ; a[6] ; c[4] ;
; N/A ; None ; 10.493 ns ; a[5] ; c[7] ;
; N/A ; None ; 10.486 ns ; a[5] ; c[4] ;
; N/A ; None ; 10.484 ns ; a[6] ; c[3] ;
; N/A ; None ; 10.480 ns ; a[6] ; c[2] ;
; N/A ; None ; 10.473 ns ; a[5] ; c[3] ;
; N/A ; None ; 10.469 ns ; a[5] ; c[2] ;
; N/A ; None ; 10.451 ns ; a[4] ; c[4] ;
; N/A ; None ; 10.399 ns ; a[7] ; c[7] ;
; N/A ; None ; 10.392 ns ; a[7] ; c[4] ;
; N/A ; None ; 10.379 ns ; a[7] ; c[3] ;
; N/A ; None ; 10.375 ns ; a[7] ; c[2] ;
; N/A ; None ; 10.229 ns ; a[1] ; c[7] ;
; N/A ; None ; 10.215 ns ; a[1] ; c[3] ;
; N/A ; None ; 10.206 ns ; a[1] ; c[2] ;
; N/A ; None ; 10.080 ns ; a[3] ; c[5] ;
; N/A ; None ; 10.072 ns ; a[5] ; c[5] ;
; N/A ; None ; 9.969 ns ; a[2] ; c[5] ;
; N/A ; None ; 9.922 ns ; a[4] ; c[5] ;
; N/A ; None ; 9.772 ns ; a[1] ; c[4] ;
; N/A ; None ; 9.606 ns ; a[8] ; c[5] ;
; N/A ; None ; 9.403 ns ; a[5] ; c[1] ;
; N/A ; None ; 9.309 ns ; a[3] ; c[1] ;
; N/A ; None ; 9.238 ns ; a[2] ; c[1] ;
; N/A ; None ; 9.195 ns ; a[8] ; c[1] ;
; N/A ; None ; 9.192 ns ; a[8] ; c[7] ;
; N/A ; None ; 9.188 ns ; a[8] ; c[4] ;
; N/A ; None ; 9.173 ns ; a[8] ; c[3] ;
; N/A ; None ; 9.169 ns ; a[8] ; c[2] ;
; N/A ; None ; 9.140 ns ; a[7] ; c[6] ;
; N/A ; None ; 9.019 ns ; a[7] ; c[1] ;
; N/A ; None ; 8.867 ns ; a[5] ; c[6] ;
; N/A ; None ; 8.823 ns ; a[6] ; c[1] ;
; N/A ; None ; 8.743 ns ; a[7] ; c[5] ;
; N/A ; None ; 8.716 ns ; a[8] ; c[6] ;
; N/A ; None ; 8.650 ns ; a[4] ; c[1] ;
; N/A ; None ; 8.609 ns ; a[6] ; c[5] ;
; N/A ; None ; 8.133 ns ; a[6] ; c[6] ;
+-------+-------------------+-----------------+------+------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
Info: Processing started: Sun Jan 11 20:43:49 2009
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off encode -c encode
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Longest tpd from source pin "a[2]" to destination pin "c[7]" is 10.788 ns
Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_28; Fanout = 4; PIN Node = 'a[2]'
Info: 2: + IC(1.990 ns) + CELL(0.740 ns) = 3.862 ns; Loc. = LC_X3_Y1_N6; Fanout = 1; COMB Node = 'c_tmp~143'
Info: 3: + IC(0.305 ns) + CELL(0.200 ns) = 4.367 ns; Loc. = LC_X3_Y1_N7; Fanout = 4; COMB Node = 'c_tmp~144'
Info: 4: + IC(0.803 ns) + CELL(0.740 ns) = 5.910 ns; Loc. = LC_X3_Y1_N1; Fanout = 1; COMB Node = 'WideOr0~4'
Info: 5: + IC(2.556 ns) + CELL(2.322 ns) = 10.788 ns; Loc. = PIN_76; Fanout = 0; PIN Node = 'c[7]'
Info: Total cell delay = 5.134 ns ( 47.59 % )
Info: Total interconnect delay = 5.654 ns ( 52.41 % )
Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings
Info: Processing ended: Sun Jan 11 20:43:50 2009
Info: Elapsed time: 00:00:02
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