add.fit.summary

来自「一些Verilog学习程序B」· SUMMARY 代码 · 共 12 行

Fitter Status : Successful - Sun Jan 11 21:29:13 2009
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : add
Top-level Entity Name : add
Family : MAX II
Device : EPM240T100C5
Timing Models : Final
Total logic elements : 12 / 240 ( 5 % )
Total pins : 15 / 80 ( 19 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )