adder4b.fit

此程序是用VHDL硬件描述语言编写的,实现四位全加器的功能

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 10/19/2008 22:51:00      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "adder4b"
BEGIN

    DEVICE = "EPM7032SLC44-5";

    "a0"                           : INPUT_PIN  = 4      ; -- LC1
    "a1"                           : INPUT_PIN  = 11     ; -- LC7
    "a2"                           : INPUT_PIN  = 12     ; -- LC8
    "a3"                           : INPUT_PIN  = 14     ; -- LC10
    "b0"                           : INPUT_PIN  = 16     ; -- LC11
    "b1"                           : INPUT_PIN  = 9      ; -- LC6
    "b2"                           : INPUT_PIN  = 8      ; -- LC5
    "b3"                           : INPUT_PIN  = 6      ; -- LC3
    "cin"                          : INPUT_PIN  = 5      ; -- LC2
    "cout"                         : OUTPUT_PIN = 36     ; -- LC22
    "s0"                           : OUTPUT_PIN = 37     ; -- LC21
    "s1"                           : OUTPUT_PIN = 39     ; -- LC19
    "s2"                           : OUTPUT_PIN = 40     ; -- LC18
    "s3"                           : OUTPUT_PIN = 41     ; -- LC17
    "|LPM_ADD_SUB:62|addcore:adder|addcore:adder0|gcp2" : LOCATION   = LC23   ; -- PIN 34
    "|LPM_ADD_SUB:62|addcore:adder|addcore:adder0|g4" : LOCATION   = LC24   ; -- PIN 33
    "|LPM_ADD_SUB:62|addcore:adder|addcore:adder0|result_node0" : LOCATION   = LC27   ; -- PIN 29
    "|LPM_ADD_SUB:62|addcore:adder|addcore:adder0|result_node1" : LOCATION   = LC25   ; -- PIN 32
    "|LPM_ADD_SUB:62|addcore:adder|addcore:adder0|result_node2" : LOCATION   = LC29   ; -- PIN 27
    "|LPM_ADD_SUB:62|addcore:adder|addcore:adder0|result_node3" : LOCATION   = LC20   ; -- PIN 38

END;

INTERNAL_INFO "adder4b"
BEGIN
	DEVICE = EPM7032SLC44-5;
	LC17    : LORAX = "G13R0";
	LC18    : LORAX = "G14R0";
	LC19    : LORAX = "G15R0";
	LC21    : LORAX = "G30R0";
	LC22    : LORAX = "G31R0";
	LC20    : LORAX = "G16R0,PA1R0C1";
	OH9R0P14 : LORAX = "G1R0,PA4R0C1";
	OH2R0P6 : LORAX = "G45R0,PA22R0C1";
	LC23    : LORAX = "G32R0,PA12R0C1";
	OH0R0P4 : LORAX = "G43R0,PA20R0C1";
	OH10R0P16 : LORAX = "G2R0,PA0R0C1";
	OH7R0P12 : LORAX = "G63R0,PA33R0C1";
	OH4R0P8 : LORAX = "G60R0,PA29R0C1";
	OH6R0P11 : LORAX = "G62R0,PA31R0C1";
	OH5R0P9 : LORAX = "G61R0,PA28R0C1";
	OH1R0P5 : LORAX = "G44R0,PA19R0C1";
	LC29    : LORAX = "G55R0,PA27R0C1";
	LC25    : LORAX = "G38R0,PA18R0C1";
	LC27    : LORAX = "G40R0,PA24R0C1";
	LC24    : LORAX = "G33R0,PA10R0C1";
END;