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📄 wenfen.rpt

📁 ISA板卡
💻 RPT
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Device-Specific Information:               i:\workcpld\tensie\speed\wenfen.rpt
wenfen

** INPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  87      -   -       INPUT  G            0      0   0    0    0    3   18  CLK_high


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
G = Global Source. Fan-out destinations counted here do not include destinations
that are driven using global routing resources. Refer to the Auto Global Signals,
Clock Signals, Clear Signals, Synchronous Load Signals, and Synchronous Clear Signals
Sections of this Report File for information on which signals' fan-outs are used as
Clock, Clear, Preset, Output Enable, and synchronous Load signals.


Device-Specific Information:               i:\workcpld\tensie\speed\wenfen.rpt
wenfen

** OUTPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  61     94    F         FF   +  t        0      0   0    0    1    0    0  B
  58     91    F     OUTPUT      t        0      0   0    1    1    0    0  dec
  57     89    F     OUTPUT      t        0      0   0    1    1    0    0  E
  56     88    F     OUTPUT      t        0      0   0    1    1    0    0  inc
  37     49    D         FF      t        1      1   0    0   12    0    1  insignal1
  52     81    F         FF      t        0      0   0    0    1    0    1  insignal2
  53     83    F         FF   +  t        0      0   0    0    1    2    0  test1
  54     85    F         FF   +  t        0      0   0    0    1    2    0  test2
  55     86    F         FF   +  t        0      0   0    0    3    2    0  test3


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:               i:\workcpld\tensie\speed\wenfen.rpt
wenfen

** BURIED LOGIC **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
 (75)   113    H       SOFT      t        0      0   0    0   14    1   16  |compare16:58|lpm_compare:lpm_compare_component|comptree:comparator|cmpchain:cmp_end|agb_out
   -     74    E       TFFE      t        1      1   0    1   13    0   15  |counter1:52|lpm_counter:lpm_counter_component|dffs0
 (47)    75    E       TFFE      t        1      1   0    1   14    0   14  |counter1:52|lpm_counter:lpm_counter_component|dffs1
 (48)    77    E       TFFE      t        1      1   0    1   15    0   13  |counter1:52|lpm_counter:lpm_counter_component|dffs2
 (49)    78    E       TFFE      t        1      1   0    1   16    0   12  |counter1:52|lpm_counter:lpm_counter_component|dffs3
   -     68    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs4
 (42)    69    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs5
 (44)    70    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs6
   -     66    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs7
 (40)    65    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs8
 (50)    80    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs9
   -     71    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs10
 (45)    72    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs11
 (46)    73    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs12
 (41)    67    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs13
   -     76    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs14
   -     79    E       TFFE      t        1      1   0    1   17    0   32  |counter1:52|lpm_counter:lpm_counter_component|dffs15
   -     90    F       TFFE   +  t        0      0   0    0    1    0   15  |counter1:57|lpm_counter:lpm_counter_component|dffs0
 (78)   118    H       TFFE   +  t        0      0   0    0    2    0   14  |counter1:57|lpm_counter:lpm_counter_component|dffs1
   -    124    H       TFFE   +  t        0      0   0    0    3    0   14  |counter1:57|lpm_counter:lpm_counter_component|dffs2
 (84)   126    H       TFFE   +  t        0      0   0    0    4    0   13  |counter1:57|lpm_counter:lpm_counter_component|dffs3
   -    127    H       TFFE   +  t        0      0   0    0    5    0   12  |counter1:57|lpm_counter:lpm_counter_component|dffs4
 (85)   128    H       TFFE   +  t        0      0   0    0    6    0   11  |counter1:57|lpm_counter:lpm_counter_component|dffs5
 (76)   115    H       TFFE   +  t        0      0   0    0    7    0   10  |counter1:57|lpm_counter:lpm_counter_component|dffs6
   -    119    H       TFFE   +  t        0      0   0    0    8    0    9  |counter1:57|lpm_counter:lpm_counter_component|dffs7
 (79)   120    H       TFFE   +  t        0      0   0    0    9    0    8  |counter1:57|lpm_counter:lpm_counter_component|dffs8
 (83)   125    H       TFFE   +  t        0      0   0    0   10    0    7  |counter1:57|lpm_counter:lpm_counter_component|dffs9
   -    114    H       TFFE   +  t        0      0   0    0   11    0    6  |counter1:57|lpm_counter:lpm_counter_component|dffs10
 (81)   123    H       TFFE   +  t        0      0   0    0   12    0    5  |counter1:57|lpm_counter:lpm_counter_component|dffs11
   -    122    H       TFFE   +  t        0      0   0    0   13    0    4  |counter1:57|lpm_counter:lpm_counter_component|dffs12
   -    116    H       TFFE   +  t        0      0   0    0   14    0    3  |counter1:57|lpm_counter:lpm_counter_component|dffs13
 (77)   117    H       TFFE   +  t        0      0   0    0   15    0    2  |counter1:57|lpm_counter:lpm_counter_component|dffs14
 (80)   121    H       TFFE   +  t        0      0   0    0   16    0    1  |counter1:57|lpm_counter:lpm_counter_component|dffs15
 (73)   112    G       TFFE      t        2      2   0    0   24    0   15  |counter1:62|lpm_counter:lpm_counter_component|dffs0
 (63)    97    G       TFFE      t        2      2   0    0   25    0   14  |counter1:62|lpm_counter:lpm_counter_component|dffs1
 (65)   101    G       TFFE      t        2      2   0    0   26    0   13  |counter1:62|lpm_counter:lpm_counter_component|dffs2
 (64)    99    G       TFFE      t        2      2   0    0   27    0   12  |counter1:62|lpm_counter:lpm_counter_component|dffs3
   -     98    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs4
   -    100    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs5
 (67)   102    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs6
   -    103    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs7
 (68)   104    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs8
 (69)   105    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs9
   -    106    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs10
 (70)   107    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs11
   -    108    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs12
 (71)   109    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs13
 (72)   110    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs14
   -    111    G       TFFE      t        2      2   0    0   28    1   16  |counter1:62|lpm_counter:lpm_counter_component|dffs15
   -     52    D       DFFE   +  t        0      0   0    0    1    0    2  |ctr:59|Q1 (|ctr:59|:4)
   -     95    F       DFFE   +  t        0      0   0    1    1    0    2  |ctr:59|Q2 (|ctr:59|:5)
   -     92    F       DFFE   +  t        0      0   0    0    1    0    2  |ctr:59|Q3 (|ctr:59|:6)
 (32)    56    D       DFFE   +  t        0      0   0    0    1    0    2  |ctr:59|Q4 (|ctr:59|:7)
   -     87    F       DFFE   +  t        0      0   0    0    1    0    1  |ctr:59|Q5 (|ctr:59|:12)
   -     55    D       DFFE   +  t        0      0   0    0    1    0    1  |ctr:59|Q6 (|ctr:59|:13)
   -     84    F       DFFE   +  t        0      0   0    0    4    0    1  |ctr:59|:20
 (36)    51    D       DFFE   +  t        0      0   0    0    4    0    1  |ctr:59|:21
   -     50    D       TFFE   +  t        0      0   0    0    3    1   19  |ctr:59|:24
   -     82    F       DFFE      t        0      0   0    0    3    1    3  :30
 (62)    96    F       DFFE      t        0      0   0    0    3    1    3  :32
 (60)    93    F       TFFE      t        0      0   0    1    1    0    2  :67
 (30)    59    D       DFFE      t        0      0   0    0    1    0    1  x1 (:68)
 (31)    57    D       DFFE      t        0      0   0    0    2    0    1  x2 (:69)


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:               i:\workcpld\tensie\speed\wenfen.rpt
wenfen

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                         Logic cells placed in LAB 'D'
        +--------------- LC52 |ctr:59|Q1
        | +------------- LC56 |ctr:59|Q4
        | | +----------- LC55 |ctr:59|Q6
        | | | +--------- LC51 |ctr:59|:21
        | | | | +------- LC50 |ctr:59|:24
        | | | | | +----- LC49 insignal1
        | | | | | | +--- LC59 x1
        | | | | | | | +- LC57 x2
        | | | | | | | | 
        | | | | | | | |   Other LABs fed by signals
        | | | | | | | |   that feed LAB 'D'
LC      | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'D':
LC56 -> - - * * - - - - | - - - * - - - - | <-- |ctr:59|Q4
LC55 -> - - - * - - - - | - - - * - - - - | <-- |ctr:59|Q6
LC51 -> - - - - * - - - | - - - * - - - - | <-- |ctr:59|:21
LC50 -> - - - * * - - - | - - - * * * - - | <-- |ctr:59|:24
LC59 -> - - - - - - - * | - - - * - - - - | <-- x1
LC57 -> * - - - - - - - | - - - * - - - - | <-- x2

Pin
87   -> - - - - - - - - | - - - - * * - - | <-- CLK_high
LC98 -> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs4
LC100-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs5
LC102-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs6
LC103-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs7
LC104-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs8
LC105-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs9
LC106-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs10
LC107-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs11
LC108-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs12
LC109-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs13
LC110-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs14
LC111-> - - - - - * - - | - - - * - - * - | <-- |counter1:62|lpm_counter:lpm_counter_component|dffs15
LC95 -> - * - * - - - - | - - - * - - - - | <-- |ctr:59|Q2
LC84 -> - - - - * - - - | - - - * - - - - | <-- |ctr:59|:20
LC93 -> - - - - - - * * | - - - * - - - - | <-- :67


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:               i:\workcpld\tensie\speed\wenfen.rpt
wenfen

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'E':

                                         Logic cells placed in LAB 'E'
        +------------------------------- LC74 |counter1:52|lpm_counter:lpm_counter_component|dffs0
        | +----------------------------- LC75 |counter1:52|lpm_counter:lpm_counter_component|dffs1
        | | +--------------------------- LC77 |counter1:52|lpm_counter:lpm_counter_component|dffs2
        | | | +------------------------- LC78 |counter1:52|lpm_counter:lpm_counter_component|dffs3
        | | | | +----------------------- LC68 |counter1:52|lpm_counter:lpm_counter_component|dffs4
        | | | | | +--------------------- LC69 |counter1:52|lpm_counter:lpm_counter_component|dffs5
        | | | | | | +------------------- LC70 |counter1:52|lpm_counter:lpm_counter_component|dffs6
        | | | | | | | +----------------- LC66 |counter1:52|lpm_counter:lpm_counter_component|dffs7
        | | | | | | | | +--------------- LC65 |counter1:52|lpm_counter:lpm_counter_component|dffs8
        | | | | | | | | | +------------- LC80 |counter1:52|lpm_counter:lpm_counter_component|dffs9
        | | | | | | | | | | +----------- LC71 |counter1:52|lpm_counter:lpm_counter_component|dffs10
        | | | | | | | | | | | +--------- LC72 |counter1:52|lpm_counter:lpm_counter_component|dffs11
        | | | | | | | | | | | | +------- LC73 |counter1:52|lpm_counter:lpm_counter_component|dffs12
        | | | | | | | | | | | | | +----- LC67 |counter1:52|lpm_counter:lpm_counter_component|dffs13
        | | | | | | | | | | | | | | +--- LC76 |counter1:52|lpm_counter:lpm_counter_component|dffs14
        | | | | | | | | | | | | | | | +- LC79 |counter1:52|lpm_counter:lpm_counter_component|dffs15
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'E'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'E':
LC74 -> * * * * * * * * * * * * * * * * | - - - - * - - - | <-- |counter1:52|lpm_counter:lpm_counter_component|dffs0
LC75 -> - * * * * * * * * * * * * * * * | - - - - * - - - | <-- |counter1:52|lpm_counter:lpm_counter_component|dffs1

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