📄 test.rpt
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LC?? -> - * - - * - - - | - - * - - - - - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches9~1
LC?? -> - - * - - * - - | - - * - - - - - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches10~1
LC?? -> - - - - - - * - | - * * - - - - - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches15~1
LC?? -> * - - - - - - - | * - * * - - - - * - | <-- |latch:454|O0
LC?? -> - * - - - - - - | - - * * - - - - - - | <-- |latch:454|O1
LC?? -> - - * * * * * - | - * * * - * * * * - | <-- |latch:454|O2
LC?? -> - * - - - - - - | - - * - - - - - - - | <-- CK1
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: i:\workcpld\tensie\speed\test.rpt
test
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'D':
Logic cells placed in LAB 'D'
+-------------------------------LC???|compare1:564|lpm_compare:lpm_compare_component|comptree:comparator|cmpchain:cmp_end|agb_out_node
| +-----------------------------LC???|compare10:547|lpm_compare:lpm_compare_component|comptree:comparator|cmpchain:cmp0|lcarry4
| | +---------------------------LC???|compare10:547|lpm_compare:lpm_compare_component|comptree:comparator|cmpchain:cmp0|:76
| | | +-------------------------LC???|count16:549|lpm_counter:lpm_counter_component|dffs0
| | | | +-----------------------LC???|count16:549|lpm_counter:lpm_counter_component|dffs2
| | | | | +---------------------LC???|count16:549|lpm_counter:lpm_counter_component|dffs3
| | | | | | +-------------------LC???|count16:549|lpm_counter:lpm_counter_component|dffs5
| | | | | | | +-----------------LC???|count24:214|lpm_counter:lpm_counter_component|dffs0
| | | | | | | | +---------------LC???|count24:214|lpm_counter:lpm_counter_component|dffs1
| | | | | | | | | +-------------LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches0~1
| | | | | | | | | | +-----------LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches13~1
| | | | | | | | | | | +---------LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches19~1
| | | | | | | | | | | | +-------LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches20~1
| | | | | | | | | | | | | +-----LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches21~1
| | | | | | | | | | | | | | +---LC???
| | | | | | | | | | | | | | | +-LC???
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'D'
LC | | | | | | | | | | | | | | | | | A B C D E F G H I J | Logic cells that feed LAB 'D':
Pin
83 -> - - - * * * * - - - - - - - - - | - - - * - * - - - * | <-- GCLK
LC147-> - - - - - - - * * - - - - - - - | * - * * - - - - * - | <-- CK0-3
LC?? -> - - - * * * * - - - - - - - - - | - - - * - - - - - * | <-- |compare10:547|lpm_compare:lpm_compare_component|comptree:comparator|comptree:sub_comptree|cmpchain:gt_cmp_end|:40
LC?? -> * - - - - - - - - - - - - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs0
LC?? -> * - - - - - - - - - - - - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs1
LC?? -> * - - - - - - - - - - - - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs2
LC?? -> * - - - - - - - - - - - - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs3
LC?? -> - * - * * * * - - - - - - - - - | - - - * - - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs0
LC?? -> - * - - * * * - - - - - - - - - | - - - * - - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs1
LC?? -> - * - - * * * - - - - - - - - - | - - - * - - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs2
LC?? -> - * - - - * * - - - - - - - - - | - - - * - - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs3
LC?? -> - * - - - - * - - - - - - - - - | - - - * - - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs4
LC?? -> - - * - - - * - - - - - - - - - | - - - * - - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs5
LC?? -> - - - - - - - * * * - - - - - - | * - - * - - - - * - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs0
LC?? -> - - - - - - - - - - * - - - - - | * - - * - - - - - - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs13
LC?? -> - - - - - - - - - - - * - - - - | * - - * - - - - - - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs19
LC?? -> - - - - - - - - - - - - * - - - | * - - * - - - - - - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs20
LC?? -> - - - - - - - - - - - - - * - - | * - - * - - - - - - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs21
LC?? -> - - - - - - - - - * - - - - - - | - - - * - - - * - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches0~1
LC?? -> - - - - - - - - - - * - - - - - | - * - * - - - - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches13~1
LC?? -> - - - - - - - - - - - * - - - - | - - - * - - * - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches19~1
LC?? -> - - - - - - - - - - - - * - - - | - - - * - - * - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches20~1
LC?? -> - - - - - - - - - - - - - * - - | - - - * - - * - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches21~1
LC?? -> * * - - - - - * * - - - - - - - | * - * * - - - - * - | <-- |latch:454|O0
LC?? -> * * - - - - - - - - - - - - - - | - - * * - - - - - - | <-- |latch:454|O1
LC?? -> * * - - - - - - - * * * * * - - | - * * * - * * * * - | <-- |latch:454|O2
LC?? -> * * - - - - - - - - - - - - - - | - * - * - - - - - - | <-- |latch:454|O3
LC?? -> - * - - - - - - - - - - - - - - | - * - * - * - - - - | <-- |latch:454|O4
LC?? -> - - * - - - - - - - - - - - - - | - - - * - - - - - * | <-- |latch:454|O5
LC?? -> - - - * * * * - - - - - - - - - | - * - * - - - - - * | <-- |latch:454|O6
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: i:\workcpld\tensie\speed\test.rpt
test
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'E':
Logic cells placed in LAB 'E'
+-------------------------LC???|compare10:547|lpm_compare:lpm_compare_component|comptree:comparator|cmpchain:cmp1|:77
| +-----------------------LC???|latch:454|O1
| | +---------------------LC???|latch:454|O2
| | | +-------------------LC???|latch:454|O3
| | | | +-----------------LC???|latch:454|O4
| | | | | +---------------LC???|latch:454|O5
| | | | | | +-------------LC???|latch:454|O6
| | | | | | | +-----------LC???|latch:454|O7
| | | | | | | | +---------LC???|latch:456|O0
| | | | | | | | | +-------LC???|latch:456|O1
| | | | | | | | | | +-----LC???|latch:456|O2
| | | | | | | | | | | +---LC???|latch:456|O5
| | | | | | | | | | | | +-LC???|latch:456|O6
| | | | | | | | | | | | |
| | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | that feed LAB 'E'
LC | | | | | | | | | | | | | | A B C D E F G H I J | Logic cells that feed LAB 'E':
Pin
50 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- AEN
24 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A0
25 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A1
27 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A2
28 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A3
29 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A4
30 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A5
31 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A6
33 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A7
34 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A8
35 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A9
36 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A10
37 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A11
9 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A12
40 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A13
41 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A14
44 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A15
45 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A16
8 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A17
48 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A18
49 -> - * * * * * * * * * * * * | - * * - * - * * - - | <-- A19
83 -> - - - - - - - - - - - - - | - - - * - * - - - * | <-- GCLK
52 -> - * * * * * * * * * * * * | - * - - * - - * - - | <-- WR/
LC118-> - * - - - - - - - - - - - | - - - - * - - - - - | <-- D1
LC115-> - - * - - - - - - - - - - | - - - - * - - - - - | <-- D2
LC112-> - - - * - - - - - - - - - | - - - - * - - - - - | <-- D3
LC110-> - - - - * - - - - - - - - | - - - - * - - - - - | <-- D4
LC107-> - - - - - * - - - - - - - | - - - - * - - * - - | <-- D5
LC104-> - - - - - - * - - - - - - | - - - - * - - - - - | <-- D6
LC102-> - - - - - - - * - - - - - | - - - - * - - * - - | <-- D7
LC48 -> - - - - - - - - * - - - - | - - - - * - - - - - | <-- D8
LC46 -> - - - - - - - - - * - - - | - - - - * - - - - - | <-- D9
LC43 -> - - - - - - - - - - * - - | - - - - * - - - - - | <-- D10
LC24 -> - - - - - - - - - - - * - | - - - - * - - - - - | <-- D13
LC25 -> - - - - - - - - - - - - * | - - - - * - - - - - | <-- D14
LC?? -> * - - - - - - - - - - - - | - - - - * - - - - * | <-- |count16:549|lpm_counter:lpm_counter_component|dffs15
LC?? -> * - - - - - - - - - - - - | - - - - * - - - - * | <-- |latch:456|O7
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: i:\workcpld\tensie\speed\test.rpt
test
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'F':
Logic cells placed in LAB 'F'
+---------------LC???|counter1:566|lpm_counter:lpm_counter_component|dffs0
| +-------------LC???|counter1:566|lpm_counter:lpm_counter_component|dffs1
| | +-----------LC???|counter1:566|lpm_counter:lpm_counter_component|dffs2
| | | +---------LC???|counter1:566|lpm_counter:lpm_counter_component|dffs3
| | | | +-------LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches1~1
| | | | | +-----LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches12~1
| | | | | | +---LC???|LATCH24:215|lpm_latch:lpm_latch_component|latches14~1
| | | | | | | +-LC???CK1
| | | | | | | |
| | | | | | | | Other LABs fed by signals
| | | | | | | | that feed LAB 'F'
LC | | | | | | | | | A B C D E F G H I J | Logic cells that feed LAB 'F':
Pin
83 -> * * * * - - - - | - - - * - * - - - * | <-- GCLK
LC?? -> * * * * - - - * | - - - - - * - - - - | <-- |compare1:564|lpm_compare:lpm_compare_component|comptree:comparator|cmpchain:cmp_end|agb_out_node
LC?? -> * * * * - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs0
LC?? -> - * * * - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs1
LC?? -> - - * * - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs2
LC?? -> - - - * - - - - | - - - * - * - - - - | <-- |counter1:566|lpm_counter:lpm_counter_component|dffs3
LC?? -> - - - - * - - - | * - - - - * - - * - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs1
LC?? -> - - - - - * - - | * - - - - * - - - - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs12
LC?? -> - - - - - - * - | * - - - - * - - - - | <-- |count24:214|lpm_counter:lpm_counter_component|dffs14
LC?? -> - - - - * - - - | - - - - - * - * - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches1~1
LC?? -> - - - - - * - - | - * - - - * - - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches12~1
LC?? -> - - - - - - * - | - * - - - * - - - - | <-- |LATCH24:215|lpm_latch:lpm_latch_component|latches14~1
LC?? -> - - - - * * * - | - * * * - * * * * - | <-- |latch:454|O2
LC?? -> * * * * - - - - | - * - * - * - - - - | <-- |latch:454|O4
* = The logic cell or pin is an in⌨️ 快捷键说明
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