dreamtime.rpt

来自「应用MaxplusII平台的数字时钟的VHDL源程序」· RPT 代码 · 共 1,006 行 · 第 1/5 页

Project Information                                  d:\newclock\dreamtime.rpt

MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 06/29/2008 16:37:54

Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input Output Bidir  Memory  Memory  			 LCs
POF       Device          Pins  Pins   Pins   Bits % Utilized  LCs  % Utilized

dreamtime
      EP1K30QC208-3        16     12     0    0         0  %    264      15 %

User Pins:                 16     12     0  



Project Information                                  d:\newclock\dreamtime.rpt

** PROJECT COMPILATION MESSAGES **

Info: Reserved unused input pin 'begendmat' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board


Project Information                                  d:\newclock\dreamtime.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

dreamtime@69                      addsel0
dreamtime@70                      addsel1
dreamtime@71                      addsel2
dreamtime@38                      alarm
dreamtime@87                      begend
dreamtime@88                      begendmat
dreamtime@83                      clk
dreamtime@85                      enter
dreamtime@90                      entermat
dreamtime@86                      keyup
dreamtime@89                      keyupmat
dreamtime@39                      reset
dreamtime@44                      RTIN0
dreamtime@46                      RTIN1
dreamtime@47                      RTIN2
dreamtime@93                      sclk
dreamtime@60                      secdis0
dreamtime@61                      secdis1
dreamtime@62                      secdis2
dreamtime@63                      secdis3
dreamtime@64                      secdis4
dreamtime@65                      secdis5
dreamtime@67                      secdis6
dreamtime@68                      secdis7
dreamtime@73                      STOPIN0
dreamtime@74                      STOPIN1
dreamtime@75                      STOPIN2
dreamtime@41                      whole


Project Information                                  d:\newclock\dreamtime.rpt

** STATE MACHINE ASSIGNMENTS **


|CONTROL:20|adjsta: MACHINE
        OF BITS (
           |CONTROL:20|adjsta~7,
           |CONTROL:20|adjsta~6,
           |CONTROL:20|adjsta~5,
           |CONTROL:20|adjsta~4,
           |CONTROL:20|adjsta~3,
           |CONTROL:20|adjsta~2,
           |CONTROL:20|adjsta~1
        )
        WITH STATES (
                           sethh = B"1000001", 
                           sethl = B"0100001", 
                           setmh = B"0010001", 
                           setml = B"0001001", 
                           setsh = B"0000101", 
                           setsl = B"0000011", 
                             ini = B"0000000"
);


|MAT:2|adjstamat: MACHINE
        OF BITS (
           |MAT:2|adjstamat~5,
           |MAT:2|adjstamat~4,
           |MAT:2|adjstamat~3,
           |MAT:2|adjstamat~2,
           |MAT:2|adjstamat~1
        )
        WITH STATES (
                           sethh = B"10001", 
                           sethl = B"01001", 
                           setmh = B"00101", 
                           setml = B"00011", 
                             ini = B"00000"
);



Project Information                                  d:\newclock\dreamtime.rpt

** FILE HIERARCHY **



|control:20|
|control:20|lpm_add_sub:223|
|control:20|lpm_add_sub:223|addcore:adder|
|control:20|lpm_add_sub:223|altshift:result_ext_latency_ffs|
|control:20|lpm_add_sub:223|altshift:carry_ext_latency_ffs|
|control:20|lpm_add_sub:223|altshift:oflow_ext_latency_ffs|
|control:20|lpm_add_sub:247|
|control:20|lpm_add_sub:247|addcore:adder|
|control:20|lpm_add_sub:247|altshift:result_ext_latency_ffs|
|control:20|lpm_add_sub:247|altshift:carry_ext_latency_ffs|
|control:20|lpm_add_sub:247|altshift:oflow_ext_latency_ffs|
|control:20|lpm_add_sub:273|
|control:20|lpm_add_sub:273|addcore:adder|
|control:20|lpm_add_sub:273|altshift:result_ext_latency_ffs|
|control:20|lpm_add_sub:273|altshift:carry_ext_latency_ffs|
|control:20|lpm_add_sub:273|altshift:oflow_ext_latency_ffs|
|control:20|lpm_add_sub:300|
|control:20|lpm_add_sub:300|addcore:adder|
|control:20|lpm_add_sub:300|altshift:result_ext_latency_ffs|
|control:20|lpm_add_sub:300|altshift:carry_ext_latency_ffs|
|control:20|lpm_add_sub:300|altshift:oflow_ext_latency_ffs|
|control:20|lpm_add_sub:326|
|control:20|lpm_add_sub:326|addcore:adder|
|control:20|lpm_add_sub:326|altshift:result_ext_latency_ffs|
|control:20|lpm_add_sub:326|altshift:carry_ext_latency_ffs|
|control:20|lpm_add_sub:326|altshift:oflow_ext_latency_ffs|
|control:20|lpm_add_sub:353|
|control:20|lpm_add_sub:353|addcore:adder|
|control:20|lpm_add_sub:353|altshift:result_ext_latency_ffs|
|control:20|lpm_add_sub:353|altshift:carry_ext_latency_ffs|
|control:20|lpm_add_sub:353|altshift:oflow_ext_latency_ffs|
|clock:19|
|clock:19|lpm_add_sub:325|
|clock:19|lpm_add_sub:325|addcore:adder|
|clock:19|lpm_add_sub:325|altshift:result_ext_latency_ffs|
|clock:19|lpm_add_sub:325|altshift:carry_ext_latency_ffs|
|clock:19|lpm_add_sub:325|altshift:oflow_ext_latency_ffs|
|clock:19|lpm_add_sub:365|
|clock:19|lpm_add_sub:365|addcore:adder|
|clock:19|lpm_add_sub:365|altshift:result_ext_latency_ffs|
|clock:19|lpm_add_sub:365|altshift:carry_ext_latency_ffs|
|clock:19|lpm_add_sub:365|altshift:oflow_ext_latency_ffs|
|clock:19|lpm_add_sub:463|
|clock:19|lpm_add_sub:463|addcore:adder|
|clock:19|lpm_add_sub:463|altshift:result_ext_latency_ffs|
|clock:19|lpm_add_sub:463|altshift:carry_ext_latency_ffs|
|clock:19|lpm_add_sub:463|altshift:oflow_ext_latency_ffs|
|clock:19|lpm_add_sub:563|
|clock:19|lpm_add_sub:563|addcore:adder|
|clock:19|lpm_add_sub:563|altshift:result_ext_latency_ffs|
|clock:19|lpm_add_sub:563|altshift:carry_ext_latency_ffs|
|clock:19|lpm_add_sub:563|altshift:oflow_ext_latency_ffs|
|clock:19|lpm_add_sub:689|
|clock:19|lpm_add_sub:689|addcore:adder|
|clock:19|lpm_add_sub:689|altshift:result_ext_latency_ffs|
|clock:19|lpm_add_sub:689|altshift:carry_ext_latency_ffs|
|clock:19|lpm_add_sub:689|altshift:oflow_ext_latency_ffs|
|clock:19|lpm_add_sub:838|
|clock:19|lpm_add_sub:838|addcore:adder|
|clock:19|lpm_add_sub:838|altshift:result_ext_latency_ffs|
|clock:19|lpm_add_sub:838|altshift:carry_ext_latency_ffs|
|clock:19|lpm_add_sub:838|altshift:oflow_ext_latency_ffs|