de2_ccd_detect.tan.summary

DC2的用户手册

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 6.941 ns
From           : DRAM_DQ[2]
To             : Sdram_Control_4Port:u6|mDATAOUT[2]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 16.367 ns
From           : Y
To             : VGA_R[0]
From Clock     : CLOCK_50
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 10.310 ns
From           : SW[15]
To             : LEDR[15]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 3.707 ns
From           : SW[4]
To             : I2C_CCD_Config:u7|mI2C_DATA[4]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0'
Slack          : 2.809 ns
Required Time  : 100.00 MHz ( period = 10.000 ns )
Actual Time    : 139.06 MHz ( period = 7.191 ns )
From           : Sdram_Control_4Port:u6|Sdram_FIFO:read_fifo2|dcfifo:dcfifo_component|dcfifo_7lb1:auto_generated|dffpipe_gd9:ws_bwp|dffe5a[1]
To             : Sdram_Control_4Port:u6|mADDR[21]
From Clock     : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
To Clock       : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'CLOCK_50'
Slack          : 11.745 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 121.14 MHz ( period = 8.255 ns )
From           : Y
To             : DLY_cont[17]
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'GPIO_1[10]'
Slack          : 34.462 ns
Required Time  : 25.00 MHz ( period = 40.000 ns )
Actual Time    : 180.57 MHz ( period = 5.538 ns )
From           : CCD_Capture:u3|Y_Cont[0]
To             : RAW2RGB:u4|mCCD_G[10]
From Clock     : GPIO_1[10]
To Clock       : GPIO_1[10]
Failed Paths   : 0

Type           : Clock Setup: 'Audio_PLL:u10|altpll:altpll_component|_clk0'
Slack          : 51.782 ns
Required Time  : 18.41 MHz ( period = 54.320 ns )
Actual Time    : 394.01 MHz ( period = 2.538 ns )
From           : AUDIO_DAC:u9|LRCK_1X_DIV[1]
To             : AUDIO_DAC:u9|LRCK_1X_DIV[8]
From Clock     : Audio_PLL:u10|altpll:altpll_component|_clk0
To Clock       : Audio_PLL:u10|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0'
Slack          : 0.391 ns
Required Time  : 100.00 MHz ( period = 10.000 ns )
Actual Time    : N/A
From           : Sdram_Control_4Port:u6|ST[0]
To             : Sdram_Control_4Port:u6|ST[0]
From Clock     : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
To Clock       : Sdram_Control_4Port:u6|Sdram_PLL:sdram_pll1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'Audio_PLL:u10|altpll:altpll_component|_clk0'
Slack          : 0.391 ns
Required Time  : 18.41 MHz ( period = 54.320 ns )
Actual Time    : N/A
From           : AUDIO_DAC:u9|LRCK_1X
To             : AUDIO_DAC:u9|LRCK_1X
From Clock     : Audio_PLL:u10|altpll:altpll_component|_clk0
To Clock       : Audio_PLL:u10|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'GPIO_1[10]'
Slack          : 0.391 ns
Required Time  : 25.00 MHz ( period = 40.000 ns )
Actual Time    : N/A
From           : CCD_Capture:u3|mSTART
To             : CCD_Capture:u3|mSTART
From Clock     : GPIO_1[10]
To Clock       : GPIO_1[10]
Failed Paths   : 0

Type           : Clock Hold: 'CLOCK_50'
Slack          : 0.391 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : Reset_Delay:u2|oRST_1
To             : Reset_Delay:u2|oRST_1
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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