mico8_mrp.html

Lattice 超精简8位软核CPU--Mico8

     I70/duty_cyle_un11_counter_4, I70/duty_6, I70/duty_7
I72/SLICE_103 (PFU) covers blocks: I72/nextTxState_i_a2_1, I72/N_86_i,
     I72/StartSending
I72/SLICE_104 (PFU) covers blocks: I72/N_84_i, I72/TXShiftRegister_7_0_2,
     I72/TXShiftRegister_1, I72/TXShiftRegister_2
I72/SLICE_105 (PFU) covers blocks: I72/TXShiftRegister_7_0_3,
     I72/TXShiftRegister_7_0_4, I72/TXShiftRegister_3, I72/TXShiftRegister_4
I72/SLICE_106 (PFU) covers blocks: I72/TXShiftRegister_7_0_5,
     I72/TXShiftRegister_7_0_6, I72/TXShiftRegister_5, I72/TXShiftRegister_6
I72/SLICE_107 (PFU) covers blocks: I72/TXShiftRegister_7_0_7,
     I72/TXShiftRegister_7_0_8, I72/TXShiftRegister_7, I72/TXShiftRegister_8
I72/SLICE_108 (PFU) covers blocks: I72/txdata8, I72/StartSending_1_sqmuxa_i,
     I72/TX_Req
I72/SLICE_111 (PFU) covers blocks: I72/TXD_2_iv, I72/TxData_4, I72/TxData_5
I72/SLICE_112 (PFU) covers blocks: I72/TxState_14_8, I72/txdata8_0_0,
     I72/TxData_6, I72/TxData_7
I72/SLICE_113 (PFU) covers blocks: I72/nextTxState_0_sqmuxa,
     I72/nextTxState_i_1, I72/TxState_0, I72/TxState_1
I72/SLICE_114 (PFU) covers blocks: I72/bitcounter_6_0,
     I72/un1_bitcounter_1_axbxc1, I72/bitcounter_0, I72/bitcounter_1
I72/SLICE_115 (PFU) covers blocks: I72/un1_bitcounter_1_axbxc2,
     I72/bitcounter_6_3, I72/bitcounter_2, I72/bitcounter_3
I72/SLICE_116 (PFU) covers blocks: I72/timecounter_i_0, I72/TxState_14,
     I72/timecounter_0
I72/SLICE_117 (PFU) covers blocks: I72/timecounter_3_3, I72/TxState_14,
     I72/timecounter_3
I72/SLICE_118 (PFU) covers blocks: I72/timecounter_3_5, I72/TxState_14,
     I72/timecounter_5
I72/SLICE_119 (PFU) covers blocks: I72/timecounter_3_7, I72/TxState_14,
     I72/timecounter_7
I72/SLICE_120 (PFU) covers blocks: I72/timecounter_3_8, I72/TxState_14,
     I72/timecounter_8
I72/SLICE_121 (PFU) covers blocks: I72/timecounter_3_9, I72/TxState_14,
     I72/timecounter_9
I72/SLICE_122 (PFU) covers blocks: I72/timecounter_3_11, I72/TxState_14,
     I72/timecounter_11
I74/SLICE_123 (PFU) covers blocks: I74/Segm_Out1_1_6_0__m17_0, I74/Leds_out_0,
     I74/Leds_out_1
I74/SLICE_124 (PFU) covers blocks: I74/N_23_i_a2, I74/Leds_out_2, I74/Leds_out_3
I74/SLICE_125 (PFU) covers blocks: I74/Segm_Out2_1_6_0__m17_0, I74/Leds_out_4,
     I74/Leds_out_5
I74/SLICE_126 (PFU) covers blocks: I74/N_5_i_a2, I74/Leds_out_6, I74/Leds_out_7
I74/SLICE_128 (PFU) covers blocks: I74/zWR, I74/Leds_out_0_sqmuxa_1,
     I74/zWR_Q_res_reg
I75/SLICE_129 (PFU) covers blocks: I75/N_29_i, I75/un1_per0_reg12_i_s_0,
     I75/INT_REG_0
I75/SLICE_130 (PFU) covers blocks: I75/N_282_i, I75/INT_REG_33_52_i_o4,
     I75/INT_REG_1
I75/SLICE_131 (PFU) covers blocks: I75/N_295_i, I75/N_35_i, I75/INT_REG_2,
     I75/INT_REG_3
I75/SLICE_132 (PFU) covers blocks: I75/N_272_i, I75/INT_contr_ns_1_iv_0_o4_0_0,
     I75/INT_contr_0
I75/SLICE_133 (PFU) covers blocks: I75/N_273_i, I75/INT_contr_ns_0_0_a4_1,
     I75/INT_contr_1
I75/SLICE_136 (PFU) covers blocks: I75/Mico8_Data_i_0_5, I75/PER0_REG_4,
     I75/PER0_REG_5
I75/SLICE_137 (PFU) covers blocks: I75/Mico8_Data_i_0_6, I75/PER0_REG_6,
     I75/PER0_REG_7
I75/SLICE_139 (PFU) covers blocks: I75/Mico8_Data_i_1_2, I75/PER1_REG_2,
     I75/PER1_REG_3
I75/SLICE_140 (PFU) covers blocks: I75/Mico8_Data_i_0_4, I75/PER1_REG_4,
     I75/PER1_REG_5
I75/SLICE_141 (PFU) covers blocks: I75/Mico8_Data_i_0_7, I75/PER1_REG_6,
     I75/PER1_REG_7
I75/SLICE_142 (PFU) covers blocks: I75/Mico8_Data_i_1_0, I75/PER2_REG_0,
     I75/PER2_REG_1
I75/SLICE_143 (PFU) covers blocks: I75/Mico8_Data_i_1_3, I75/PER2_REG_2,
     I75/PER2_REG_3
I75/SLICE_144 (PFU) covers blocks: I75/Mico8_Data_i_1_4, I75/PER2_REG_4,
     I75/PER2_REG_5
I75/SLICE_145 (PFU) covers blocks: I75/Mico8_Data_i_1_7,
     I75/INT_contr_ns_0_0_o2_1, I75/PER2_REG_6, I75/PER2_REG_7
I75/SLICE_146 (PFU) covers blocks: I75/count_lm_0_0, I75/count_lm_0_1,
     I75/count_0, I75/count_1
I75/SLICE_147 (PFU) covers blocks: I75/count_lm_0_2, I75/count_lm_0_3,
     I75/count_2, I75/count_3
I75/SLICE_148 (PFU) covers blocks: I75/count_lm_0_4,
     I75/un1_Mico8_INT_1_sqmuxa_1_0_i_o4, I75/count_4
I76/SLICE_149 (PFU) covers blocks: I76/DIP8_contr_1_sqmuxa_i, I76/DIP8_contr_0,
     I76/prev2_state_0
I76/SLICE_150 (PFU) covers blocks: I76/DIP_Check_count_3_1_SUM0,
     I76/DIP_Check_count_3_1_SUM1, I76/count_0, I76/count_1
I77/SLICE_159 (PFU) covers blocks: I77/un8_faling_edge_rxd,
     I77/un8_faling_edge_rxd_1, I77/StartReceive
I77/SLICE_160 (PFU) covers blocks: I77/UARTState_ns_0_0,
     I77/un10_timecounter_pulse_1_0_o2, I77/UARTState_0, I77/UARTState_1
I77/SLICE_161 (PFU) covers blocks: I77/N_136_i, I77/bitcounter_5_1_N_11_i_i,
     I77/bitcounter_0, I77/bitcounter_1
I77/SLICE_162 (PFU) covers blocks: I77/bitcounter_5_1_N_12_i_i,
     I77/un10_timecounter_pulse_1_0_o2, I77/bitcounter_2
I77/SLICE_163 (PFU) covers blocks: I77/UARTState_i_1,
     I77/buffer_empty_1_sqmuxa_i, I77/buffer_empty
I77/SLICE_165 (PFU) covers blocks: I77/timecounter_lm_0_0,
     I77/timecounter_lm_0_1, I77/timecounter_0, I77/timecounter_1
I77/SLICE_166 (PFU) covers blocks: I77/timecounter_lm_0_2,
     I77/timecounter_lm_0_3, I77/timecounter_2, I77/timecounter_3
I77/SLICE_167 (PFU) covers blocks: I77/timecounter_lm_0_4,
     I77/timecounter_lm_0_5, I77/timecounter_4, I77/timecounter_5
I77/SLICE_168 (PFU) covers blocks: I77/timecounter_lm_0_6,
     I77/timecounter_lm_0_7, I77/timecounter_6, I77/timecounter_7
I77/SLICE_169 (PFU) covers blocks: I77/timecounter_lm_0_8,
     I77/timecounter_lm_0_9, I77/timecounter_8, I77/timecounter_9
I77/SLICE_170 (PFU) covers blocks: I77/timecounter_lm_0_10,
     I77/timecounter_lm_0_11, I77/timecounter_10, I77/timecounter_11
I77/SLICE_171 (PFU) covers blocks: I77/timecounter_lm_0_12,
     I77/un1_timecounter_pulse_0_a2, I77/timecounter_12
I78/SLICE_172 (PFU) covers blocks: I78/u1_isp8/u1_isp8_io_cntl/ext_mem_wr_1_1,
     I78/U2_scratchpad/LUT4_0, I78/u1_isp8/u1_isp8_io_cntl/ext_mem_wr
I78/u1_isp8/SLICE_173 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/cout_alu_u_0_a7_1,
     I78/u1_isp8/u1_isp8_alu/add_sel_i_o7,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int$r43
I78/u1_isp8/SLICE_174 (PFU) covers blocks: I78/u1_isp8/un2_wren_il_rd,
     I78/u1_isp8/wren_il_rd$r74
I78/u1_isp8/SLICE_175 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/update_c_1,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_1_6, I78/u1_isp8/din_rd1_1$r64
I78/u1_isp8/SLICE_176 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_io_cntl/un2_ext_io_wr,
     I78/u1_isp8/u1_isp8_flow_cntl/N_24_i,
     I78/u1_isp8/u1_isp8_flow_cntl/addr_cyc_int
I78/u1_isp8/SLICE_177 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/call,
     I78/u1_isp8/u1_isp8_idec/instr_l1_3,
     I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0$r71
I78/u1_isp8/SLICE_178 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/clrc,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int$r41
I78/u1_isp8/SLICE_179 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/cout_alu_u_0_1,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int_1_1_0_a2_1,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int$r44
I78/u1_isp8/SLICE_180 (PFU) covers blocks:
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_1/GATE, I78/u1_isp8/din_rd1_0$r8
I78/u1_isp8/SLICE_181 (PFU) covers blocks:
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_6/GATE, I78/u1_isp8/din_rd1_7$r4
I78/u1_isp8/SLICE_182 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_flow_cntl/un3_ext_addr_cyc_int_0_a2,
     I78/u1_isp8/u1_isp8_idec/instr_l1_3,
     I78/u1_isp8/u1_isp8_flow_cntl/ext_addr_cyc_int
I78/u1_isp8/SLICE_183 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/iels_ls,
     I78/u1_isp8/u1_isp8_idec/instr_l1_3, I78/u1_isp8/wren_il_rd$r73
I78/u1_isp8/SLICE_184 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/iret,
     I78/u1_isp8/u1_isp8_idec/re_1,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int$r0
I78/u1_isp8/SLICE_185 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/setc,
     I78/u1_isp8/u1_isp8_flow_cntl/N_286_i,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int$r1
I78/u1_isp8/SLICE_186 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_0,
     I78/u1_isp8/u1_isp8_idec/instr_l1_2, I78/u1_isp8/din_rd1_0$r10
I78/u1_isp8/SLICE_187 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_a7_7,
     I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int_1_1_0_s,
     I78/u1_isp8/din_rd1_7$r6
I78/u1_isp8/SLICE_188 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a2_1_0,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0, I78/u1_isp8/din_rd1_0$r9
I78/u1_isp8/SLICE_189 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a2_2_0,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_7, I78/u1_isp8/din_rd1_7$r5
I78/u1_isp8/SLICE_190 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a2_3_0,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_5, I78/u1_isp8/din_rd1_0$r46
I78/u1_isp8/SLICE_191 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m2_i_m3_0_7,
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_7/GATE,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_3_7, I78/u1_isp8/din_rd1_7$r38
I78/u1_isp8/SLICE_192 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m3_0_0,
     I78/u1_isp8/u1_isp8_alu/cout_alu_u_0_a7_0_1, I78/u1_isp8/din_rd1_0$r45
I78/u1_isp8/SLICE_193 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0_1, I78/u1_isp8/din_rd1_1$r63
I78/u1_isp8/SLICE_194 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0_2,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_1_2, I78/u1_isp8/din_rd1_2$r60
I78/u1_isp8/SLICE_195 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0_3,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_1_3, I78/u1_isp8/din_rd1_3$r57
I78/u1_isp8/SLICE_196 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0_4,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_1_4, I78/u1_isp8/din_rd1_4$r54
I78/u1_isp8/SLICE_197 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0_5,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a2_0_0, I78/u1_isp8/din_rd1_5$r51
I78/u1_isp8/SLICE_198 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_0_6,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a2_0, I78/u1_isp8/din_rd1_6$r48
I78/u1_isp8/SLICE_199 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_1_0,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_3_0, I78/u1_isp8/din_rd1_0$r47
I78/u1_isp8/SLICE_200 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2_1,
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_0/GATE, I78/u1_isp8/din_rd1_1$r25
I78/u1_isp8/SLICE_201 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2_2,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2, I78/u1_isp8/din_rd1_2$r28
I78/u1_isp8/SLICE_202 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2_3, I78/u1_isp8/din_rd1_3$r19
I78/u1_isp8/SLICE_203 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2_4,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_4, I78/u1_isp8/din_rd1_4$r22
I78/u1_isp8/SLICE_204 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2_5, I78/u1_isp8/din_rd1_5$r12
I78/u1_isp8/SLICE_205 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_2_6, I78/u1_isp8/din_rd1_6$r16
I78/u1_isp8/SLICE_206 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_1,
     I78/u1_isp8/din_rd1_1$r26
I78/u1_isp8/SLICE_207 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_2,
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_2/GATE, I78/u1_isp8/din_rd1_2$r29
I78/u1_isp8/SLICE_208 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_3,
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_3/GATE, I78/u1_isp8/din_rd1_3$r20
I78/u1_isp8/SLICE_209 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_4,
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_4/GATE, I78/u1_isp8/din_rd1_4$r23
I78/u1_isp8/SLICE_210 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_5,
     I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_5/GATE, I78/u1_isp8/din_rd1_5$r13
I78/u1_isp8/SLICE_211 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_6,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_6, I78/u1_isp8/din_rd1_6$r17
I78/u1_isp8/SLICE_212 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_1_7,
     I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_0_7, I78/u1_isp8/din_rd1_7$r40
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_213 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_flow_cntl/un1_addr_cyc_int_i_a2_0_2,
     I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_2$r37
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_217 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_flow_cntl/un3_0_a2_0_1,
     I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_6,
     I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_7
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_219 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_flow_cntl/N_280_i,
     I78/u1_isp8/u1_isp8_flow_cntl/pc_int_axb_0,
     I78/u1_isp8/u1_isp8_flow_cntl/br_enb_reg,
     I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_0
I78/u1_isp8/SLICE_221 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/clri_i,
     I78/u1_isp8/u1_isp8_idec/setz, I78/u1_isp8/u1_isp8_flow_cntl/ie_flag
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_222 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_3_tz,
     I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0$r33,
     I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_2
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_223 (PFU) covers blocks:
     I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_4_tz_0,
     I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_4_tz_0_0,