📄 mico8.srp
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# Info: [9566]: Logging session transcript to file C:/Projects/Reference/Mico8_vhdl/Mico8_V3/Block_Mico8_ECP2_6/mico8.srp
// Precision RTL Synthesis 2007a.9OEM_Lattice (Production Release) Wed Oct 3 17:47:12 PDT 2007
//
// Copyright (c) Mentor Graphics Corporation, 1996-2007, All Rights Reserved.
// Portions copyright 1991-2004 Compuware Corporation
// UNPUBLISHED, LICENSED SOFTWARE.
// CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS THE
// PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
//
// Running on Windows XP Gregory Maudens@BEN_SR_FAE Service Pack 2 5.01.2600 x86
//
// Start time Mon Mar 10 17:03:56 2008
# -------------------------------------------------
# Info: [9566]: Logging session transcript to file C:/Projects/Reference/Mico8_vhdl/Mico8_V3/Block_Mico8_ECP2_6/mico8.srp
# Warning: [9548]: Removed existing project c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.psp in folder c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/.
# Info: [9540]: Saved project file: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.psp.
# Info: [9574]: Input directory: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/
# Info: [9555]: Created project c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.psp in folder c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/.
# Warning: [9527]: Removed existing implementation folder: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_impl.
# Info: [9531]: Created directory: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_impl/.
# Info: [9540]: Saved project file: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.psp.
# Info: [9539]: Saved implementation file: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_impl/mico8_impl.psi.
# Info: [9554]: Created implementation mico8_impl in project c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.psp.
# Info: [9531]: Created directory: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_temp_1/.
# Info: [9575]: Results directory: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_temp_1/
# Info: [9565]: Appending project transcript to file c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_temp_1/precision.log
# Info: [9550]: Activated implementation mico8_impl in project c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.psp.
# Info: [15297]: Setting up the design to use synthesis library "lattice_ecp2.syn"
# Info: Setting Part to: "LFE2-6E"
# Info: Setting Process to: "7"
# Info: Setting Package to: "TQFP144"
# Info: [611]: Loading library initialization file C:/Tools/Lattice/ispTOOLS7_0/precision/pkgs/psr/techlibs/lattice_ecp2.tcl
# Info: [3021]: Reading file: C:/Tools/Lattice/ispTOOLS7_0/precision/pkgs/psr/techlibs/lattice_ecp2.syn.
# Info: [40000]: vhdlorder, Release 2007a.11.4
# Info: [40000]: Files sorted successfully.
# Info: [40000]: hdl-analyze, Release RTLC-Precision 2007a.11.4
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_io_cntl.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_flow_cntl.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_alu.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_idec.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_core.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_cfg5.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/RX_uart_M8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/DIP8_M8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/int_handl_m8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/seg7_m8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/rc5_decode.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/lcd_m8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/tx_uart_M8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/led_m8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/pwm_m8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/SEROUT_M8.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/ProgPRom.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/My_pll.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/SysCntrl.vhd" ...
# Info: [42502]: Analyzing input file "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.vhd" ...
# Info: [634]: Current working directory: c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8_temp_1/.
# Info: [40000]: RTLC-Driver, Release RTLC-Precision 2007a.11.4
# Info: [40000]: Last compiled on Sep 21 2007 15:47:19
# Info: [44512]: Initializing...
# Info: [44504]: Partitioning design ....
# Info: [40000]: RTLCompiler, Release RTLC-Precision 2007a.11.4
# Info: [40000]: Last compiled on Sep 21 2007 16:04:56
# Info: [44512]: Initializing...
# Info: [44522]: Root Module work.MICO8(SCHEMATIC): Pre-processing...
# Info: [44506]: Module work.isp8_cfg5(config5): Pre-processing...
# Info: [44506]: Module work.isp8_core(behave){generic map (FAMILY_NAME(1 to 2) => "XO" PORT_AW => 8 EXT_AW => 8 PROM_AW => 9 PROM_AD => 512 REGISTERS_16 => FALSE PGM_STACK_AW => 4 PGM_STACK_AD => 16)}: Pre-processing...
# Info: [44506]: Module work.isp8_idec(behave){generic map (PROM_AW => 9)}: Pre-processing...
# Info: [44506]: Module work.isp8_alu(behave){generic map (FAMILY_NAME(1 to 2) => "XO")}: Pre-processing...
# Info: [44506]: Module work.isp8_flow_cntl(behave){generic map (PROM_AW => 9 FAMILY_NAME(1 to 2) => "XO" PGM_STACK_AW => 4 PGM_STACK_AD => 16)}: Pre-processing...
# Info: [44506]: Module work.isp8_io_cntl(behave){generic map (PORT_AW => 8)}: Pre-processing...
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_core.vhd", line 298: signal page_ptr1 has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_core.vhd", line 299: signal page_ptr2 has never been used.
# Info: [44506]: Module work.RX_UART_M8(behave){generic map (CLKFREQ => 50000000 BAUDRATE => 9600)}: Pre-processing...
# Info: [45144]: Extracted FSM in module work.RX_UART_M8(behave){generic map (CLKFREQ => 50000000 BAUDRATE => 9600)}, with state variable = UARTState[1:0], async set/reset state(s) = 00 , number of states = 4.
# Info: [45144]: Preserving the original encoding in 4 state FSM
# Info: [45144]: FSM: State encoding table.
# Info: [40000]: FSM: Index Literal Encoding
# Info: [40000]: FSM: 0 00 00
# Info: [40000]: FSM: 1 01 01
# Info: [40000]: FSM: 2 10 10
# Info: [40000]: FSM: 3 11 11
# Info: [44506]: Module work.DIP8_M8(behave): Pre-processing...
# Info: [44506]: Module work.INT_Handl_M8(behave): Pre-processing...
# Info: [45144]: Extracted FSM in module work.INT_Handl_M8(behave), with state variable = INT_contr[1:0], async set/reset state(s) = 00 , number of states = 3.
# Info: [45144]: Preserving the original encoding in 3 state FSM
# Info: [45144]: FSM: State encoding table.
# Info: [40000]: FSM: Index Literal Encoding
# Info: [40000]: FSM: 0 00 00
# Info: [40000]: FSM: 1 01 01
# Info: [40000]: FSM: 2 10 10
# Info: [44506]: Module work.Seg7_M8(behave): Pre-processing...
# Info: [44506]: Module work.RC5_RX_M8(behave){generic map (clock => 50000000)}: Pre-processing...
# Info: [45143]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/rc5_decode.vhd", line 33: Enumerated type state with 7 elements encoded as onehot.
# Info: [45144]: Encodings for state values.
# Info: [40000]: value state[6-0]
# Info: [40000]: idle ------1
# Info: [40000]: wacht -----1-
# Info: [40000]: start ----1--
# Info: [40000]: toggle ---1---
# Info: [40000]: adres --1----
# Info: [40000]: commando -1-----
# Info: [40000]: puls 1------
# Info: [45144]: Extracted FSM in module work.RC5_RX_M8(behave){generic map (clock => 50000000)}, with state variable = controller[6:0], async set/reset state(s) = 0000001 , number of states = 7.
# Info: [45144]: Re-encoding 7 state FSM as "onehot".
# Info: [45144]: FSM: State encoding table.
# Info: [40000]: FSM: Index Literal Encoding
# Info: [40000]: FSM: 0 0000001 0000001
# Info: [40000]: FSM: 1 0000010 0000010
# Info: [40000]: FSM: 2 0000100 0000100
# Info: [40000]: FSM: 3 0001000 0001000
# Info: [40000]: FSM: 4 0010000 0010000
# Info: [40000]: FSM: 5 0100000 0100000
# Info: [40000]: FSM: 6 1000000 1000000
# Info: [44506]: Module work.LCD_M8(behave): Pre-processing...
# Info: [44506]: Module work.TX_UART_M8(Behave){generic map (CLKFREQ => 50000000 BAUDRATE => 9600)}: Pre-processing...
# Info: [45144]: Extracted FSM in module work.TX_UART_M8(Behave){generic map (CLKFREQ => 50000000 BAUDRATE => 9600)}, with state variable = TxState[1:0], async set/reset state(s) = 00 , number of states = 3.
# Info: [45144]: Preserving the original encoding in 3 state FSM
# Info: [45144]: FSM: State encoding table.
# Info: [40000]: FSM: Index Literal Encoding
# Info: [40000]: FSM: 0 00 00
# Info: [40000]: FSM: 1 01 01
# Info: [40000]: FSM: 2 10 10
# Info: [44506]: Module work.led_M8(behave): Pre-processing...
# Info: [44506]: Module work.pwm_M8(behave): Pre-processing...
# Info: [44506]: Module work.serout_M8(behave): Pre-processing...
# Info: [44506]: Module work.ProgPRom(Structure): Pre-processing...
# Info: [44506]: Module work.My_pll(Structure): Pre-processing...
# Info: [44506]: Module work.Sys_Cntrl(behaviour): Pre-processing...
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_alu.vhd", line 45: Input port instr[13:2] has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_flow_cntl.vhd", line 115: signal rst has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_flow_cntl.vhd", line 126: signal intr_req_actv_reg has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_core.vhd", line 273: signal test has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_cfg5.vhd", line 121: signal ext_mem_rd has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/int_handl_m8.vhd", line 113: signal INT_Set has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.vhd", line 37: signal gnd has never been used.
# Warning: [45729]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/mico8.vhd", line 38: signal vcc has never been used.
# Info: [44508]: Module work.isp8_idec(behave){generic map (PROM_AW => 9)}: Compiling...
# Info: [44508]: Module work.isp8_alu(behave){generic map (FAMILY_NAME(1 to 2) => "XO")}: Compiling...
# Info: [44508]: Module work.isp8_flow_cntl(behave){generic map (PROM_AW => 9 FAMILY_NAME(1 to 2) => "XO" PGM_STACK_AW => 4 PGM_STACK_AD => 16)}: Compiling...
# Info: [44838]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/isp8_flow_cntl.vhd", line 373: Macro Modgen_Counter "counter_updn_aclear_clock_clk_en_0_4" inferred for node "stack_ptr".
# Info: [44508]: Module work.isp8_io_cntl(behave){generic map (PORT_AW => 8)}: Compiling...
# Info: [44508]: Module work.isp8_core(behave){generic map (FAMILY_NAME(1 to 2) => "XO" PORT_AW => 8 EXT_AW => 8 PROM_AW => 9 PROM_AD => 512 REGISTERS_16 => FALSE PGM_STACK_AW => 4 PGM_STACK_AD => 16)}: Compiling...
# Info: [44508]: Module work.isp8_cfg5(config5): Compiling...
# Info: [44508]: Module work.RX_UART_M8(behave){generic map (CLKFREQ => 50000000 BAUDRATE => 9600)}: Compiling...
# Info: [44838]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/RX_uart_M8.vhd", line 148: Macro Selcounter "selcounter_13_13_13_0_1_flatten" inferred for node "timecounter".
# Info: [44838]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/RX_uart_M8.vhd", line 173: Macro Modgen_Counter "counter_dn_sload_aset_clock_clk_en_0_3" inferred for node "bitcounter".
# Info: [44508]: Module work.DIP8_M8(behave): Compiling...
# Info: [44508]: Module work.INT_Handl_M8(behave): Compiling...
# Info: [44838]: "c:/projects/reference/mico8_vhdl/mico8_v3/block_mico8_ecp2_6/int_handl_m8.vhd", line 220: Macro Modgen_Counter "counter_up_sclear_aclear_clock_clk_en_0_5" inferred for node "count".
# Info: [44508]: Module work.Seg7_M8(behave): Compiling...
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