lcd_m8.vhd

Lattice 超精简8位软核CPU--Mico8

-----------------------------------------------------------------------
-- LCD_M8.vhd
-- --------------------------------------------------------------------
-- >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
-- --------------------------------------------------------------------
-- Copyright (c) 2005 by Lattice Semiconductor Corporation
-- --------------------------------------------------------------------
--
-- Permission:
--
--   Lattice Semiconductor grants permission to use this code for use
--   in synthesis for any Lattice programmable logic product.  Other
--   use of this code, including the selling or duplication of any
--   portion is strictly prohibited.
--
-- Disclaimer:
--
--   This VHDL or Verilog source code is intended as a design reference
--   which illustrates how these types of functions can be implemented.
--   It is the user's responsibility to verify their design for
--   consistency and functionality through the use of formal
--   verification methods.  Lattice Semiconductor provides no warranty
--   regarding the use or functionality of this code.
--
-- --------------------------------------------------------------------
--           
--                     Lattice Semiconductor Corporation
--                     5555 NE Moore Court
--                     Hillsboro, OR 97214
--                     U.S.A
--
--                     TEL: 1-800-Lattice (USA and Canada)
--                          408-826-6000 (other locations)
--
--                     web: http://www.latticesemi.com/
--                     email: [e-mail]
--
-- --------------------------------------------------------------------
--
-- This is a Mico8 peripheral that interfaces to a character LCD
-- This is the simplest of simple interfaces, no intelligence is added here.
-- Address map:
-- 0000100: Data register
-- 0000101: Control register
-- All write only registers, allowing the user to use 5V character displays
-- --------------------------------------------------------------------
--
-- Revision History :
-- --------------------------------------------------------------------
--   Ver  :| Author            :| Mod. Date :| Changes Made:
--   V1.0 :| G.M.              :| 09/10/07  :| Alfa
-- --------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity LCD_M8 is
port (
	Clk : 		in std_logic;
	Reset : 	in std_logic;
	WR : 		in std_logic;
	Addr: 		in std_logic_vector(7 downto 0);
	Mico8_Data : 	in std_logic_vector (7 downto 0);
	LCD_Enable:	out std_logic;
	LCD_Data:	out std_logic_vector(7 downto 0);
	LCD_RS:		out std_logic
	);
end LCD_M8;

architecture behave of LCD_M8 is

signal zWR : std_logic;
constant LCDDRegaddress: std_logic_vector (7 downto 0) := "00000100"; -- LCD databus control register
constant LCDCRegaddress: std_logic_vector (7 downto 0) := "00000101"; -- LCD control bus register

attribute pgroup : string;
attribute pgroup of behave : architecture is "LCD";

begin

serializer: process (clk, reset, WR)
begin
	if reset = '1' then
		LCD_Enable <= '0';
		LCD_Data <= (others => '0');
		LCD_RS <= '0';
		zWR <= WR;
	elsif clk'event and clk = '1' then
		zWR <= WR;
		if (zWR /= WR) and (WR = '0') then
			if Addr = LCDDRegaddress then			-- write LCD data bus
				LCD_Data <= Mico8_Data;
			elsif Addr = LCDCregAddress then		-- write LCD control bus
				LCD_RS <= Mico8_Data(0);
				LCD_Enable <= Mico8_Data(1);
			end if;
		end if;
	end if;
end process;

	
end behave;