📄 mico8.mrp
字号:
I78/u1_isp8/SLICE_206 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_1,
I78/u1_isp8/din_rd1_1$r26
I78/u1_isp8/SLICE_207 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_2,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_2/GATE, I78/u1_isp8/din_rd1_2$r29
I78/u1_isp8/SLICE_208 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_3,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_3/GATE, I78/u1_isp8/din_rd1_3$r20
I78/u1_isp8/SLICE_209 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_4,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_4/GATE, I78/u1_isp8/din_rd1_4$r23
I78/u1_isp8/SLICE_210 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_5,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_5/GATE, I78/u1_isp8/din_rd1_5$r13
I78/u1_isp8/SLICE_211 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_a7_1_0_6,
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_0_0_6, I78/u1_isp8/din_rd1_6$r17
I78/u1_isp8/SLICE_212 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_1_7,
I78/u1_isp8/u1_isp8_alu/dout_alu_1_u_i_i_0_7, I78/u1_isp8/din_rd1_7$r40
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_213 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_addr_cyc_int_i_a2_0_2,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_2$r37
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_217 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un3_0_a2_0_1,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_6,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_7
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_219 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/N_280_i,
I78/u1_isp8/u1_isp8_flow_cntl/pc_int_axb_0,
I78/u1_isp8/u1_isp8_flow_cntl/br_enb_reg,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_0
I78/u1_isp8/SLICE_221 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/clri_i,
I78/u1_isp8/u1_isp8_idec/setz, I78/u1_isp8/u1_isp8_flow_cntl/ie_flag
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_222 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_3_tz,
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0$r33,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_2
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_223 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_4_tz_0,
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_4_tz_0_0,
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0$r70,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_4
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_224 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/N_55_i, I78/u1_isp8/u1_isp8_flow_cntl/N_57_i,
Page 17
Design: MICO8 Date: 03/14/08 11:43:15
Symbol Cross Reference (cont)
-----------------------------
I78/u1_isp8/u1_isp8_flow_cntl/pc_0, I78/u1_isp8/u1_isp8_flow_cntl/pc_1
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_225 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/N_59_i, I78/u1_isp8/u1_isp8_flow_cntl/N_61_i,
I78/u1_isp8/u1_isp8_flow_cntl/pc_2, I78/u1_isp8/u1_isp8_flow_cntl/pc_3
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_226 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/N_63_i, I78/u1_isp8/u1_isp8_flow_cntl/N_65_i,
I78/u1_isp8/u1_isp8_flow_cntl/pc_4, I78/u1_isp8/u1_isp8_flow_cntl/pc_5
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_227 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/N_68_i, I78/u1_isp8/u1_isp8_flow_cntl/N_70_i,
I78/u1_isp8/u1_isp8_flow_cntl/pc_6, I78/u1_isp8/u1_isp8_flow_cntl/pc_7
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_228 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/N_73_i,
I78/u1_isp8/u1_isp8_flow_cntl/un3_iret_i,
I78/u1_isp8/u1_isp8_flow_cntl/pc_8
I78/u1_isp8/SLICE_229 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/re,
I78/u1_isp8/u1_isp8_flow_cntl/prom_addr_1_37_i_m3_i_m2_0,
I78/u1_isp8/u1_isp8_flow_cntl/ret_reg
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_230 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_stack_ptr_axbxc1,
I78/u1_isp8/u1_isp8_flow_cntl/un1_stack_ptr_axbxc3,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_1,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_3
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_231 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_stack_ptr_axb0,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_0$r66
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_232 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_stack_ptr_axbxc2,
I78/u1_isp8/u1_isp8_flow_cntl/u1_isp8_stkmem/scuba_vlo_inst,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_2$r35
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_233 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_addr_cyc_int_i_a2_1_2,
I78/u1_isp8/u1_isp8_flow_cntl/prom_addr_1_58_i_m3_i_m2_0,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_0$r67
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_234 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_stack_ptr_p4,
I78/u1_isp8/u1_isp8_flow_cntl/stack_ptr_2$r36
I78/u1_isp8/SLICE_235 (PFU) covers blocks: I78/u1_isp8/u1_isp8_idec/update_c,
I78/u1_isp8/u1_isp8_idec/instr_l2_3,
I78/u1_isp8/u1_isp8_flow_cntl/carry_flag_int$r42
I78/u1_isp8/SLICE_236 (PFU) covers blocks: I78/u1_isp8/N_26_i,
I78/u1_isp8/u1_isp8_idec/re_1, I78/u1_isp8/wren_alu_rd
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_237 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/data_cyc_int_1_1_i,
I78/u1_isp8/u1_isp8_flow_cntl/N_302_i,
I78/u1_isp8/u1_isp8_flow_cntl/data_cyc_int
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_238 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/zero_flag_1_i,
I78/u1_isp8/u1_isp8_flow_cntl/sp_we_1_i_o2_m8_i_x2,
I78/u1_isp8/u1_isp8_flow_cntl/zero_flag
I79/SLICE_243 (PFU) covers blocks: I79/un8_faling_edge_rxd,
I79/un8_faling_edge_rxd_1, I79/StartReceive
I79/SLICE_244 (PFU) covers blocks: I79/UARTState_ns_0_0,
I79/un10_timecounter_pulse_1_0_o2, I79/UARTState_0, I79/UARTState_1
I79/SLICE_245 (PFU) covers blocks: I79/N_136_i, I79/bitcounter_5_1_N_11_i_i,
I79/bitcounter_0, I79/bitcounter_1
I79/SLICE_246 (PFU) covers blocks: I79/bitcounter_5_1_N_12_i_i,
Page 18
Design: MICO8 Date: 03/14/08 11:43:15
Symbol Cross Reference (cont)
-----------------------------
I79/un10_timecounter_pulse_1_0_o2, I79/bitcounter_2
I79/SLICE_247 (PFU) covers blocks: I79/UARTState_i_1,
I79/buffer_empty_1_sqmuxa_i, I79/buffer_empty
I79/SLICE_249 (PFU) covers blocks: I79/timecounter_lm_0_0,
I79/timecounter_lm_0_1, I79/timecounter_0, I79/timecounter_1
I79/SLICE_250 (PFU) covers blocks: I79/timecounter_lm_0_2,
I79/timecounter_lm_0_3, I79/timecounter_2, I79/timecounter_3
I79/SLICE_251 (PFU) covers blocks: I79/timecounter_lm_0_4,
I79/timecounter_lm_0_5, I79/timecounter_4, I79/timecounter_5
I79/SLICE_252 (PFU) covers blocks: I79/timecounter_lm_0_6,
I79/timecounter_lm_0_7, I79/timecounter_6, I79/timecounter_7
I79/SLICE_253 (PFU) covers blocks: I79/timecounter_lm_0_8,
I79/timecounter_lm_0_9, I79/timecounter_8, I79/timecounter_9
I79/SLICE_254 (PFU) covers blocks: I79/timecounter_lm_0_10,
I79/timecounter_lm_0_11, I79/timecounter_10, I79/timecounter_11
I79/SLICE_255 (PFU) covers blocks: I79/timecounter_lm_0_12,
I79/un1_timecounter_pulse_0_a2, I79/timecounter_12
I79/SLICE_257 (PFU) covers blocks: I79/un1_rx_req, I79/Data_Ready
I76/SLICE_258 (PFU) covers blocks: I76/Data_Out_0_sqmuxa, I76/Data_Ready,
I76/prev2_state_1
I77/SLICE_259 (PFU) covers blocks: I77/un1_rx_req, I77/Data_Ready
I78/u1_isp8/SLICE_260 (PFU) covers blocks: I78/u1_isp8/N_27_i,
I78/u1_isp8/wren_il_rd$r72
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_262 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2,
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0$r32,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_1
I78/u1_isp8/u1_isp8_io_cntl/SLICE_263 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_0_0,
I78/u1_isp8/u1_isp8_io_cntl/un6_export,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_0
I78/u1_isp8/u1_isp8_io_cntl/SLICE_264 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_0_1,
I78/u1_isp8/u1_isp8_io_cntl/un6_export,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_1
I78/u1_isp8/u1_isp8_io_cntl/SLICE_265 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_0_2,
I78/u1_isp8/u1_isp8_io_cntl/un6_export,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_2
I78/u1_isp8/u1_isp8_io_cntl/SLICE_266 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_0_3,
I78/u1_isp8/u1_isp8_io_cntl/un6_export,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_3
I78/u1_isp8/u1_isp8_io_cntl/SLICE_267 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_0_4,
I78/u1_isp8/u1_isp8_io_cntl/un6_export,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4
I78/u1_isp8/u1_isp8_io_cntl/SLICE_268 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_5,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_6,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_5,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_6
I78/u1_isp8/SLICE_269 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_4_7,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_7/GATE,
I78/u1_isp8/u1_isp8_io_cntl/ext_addr_7
Page 19
Design: MICO8 Date: 03/14/08 11:43:15
Symbol Cross Reference (cont)
-----------------------------
I78/u1_isp8/SLICE_270 (PFU) covers blocks:
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_0/GATE,
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_1/GATE,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_0,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_1
I78/u1_isp8/SLICE_271 (PFU) covers blocks:
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_2/GATE,
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_3/GATE,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_2,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_3
I78/u1_isp8/SLICE_272 (PFU) covers blocks:
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_4/GATE,
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_5/GATE,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_4,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_5
I78/u1_isp8/SLICE_273 (PFU) covers blocks:
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_6/GATE,
I78/u1_isp8/GEN_REG_32_u2_isp8_rfmem/mux_7/GATE,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_6,
I78/u1_isp8/u1_isp8_io_cntl/ext_dout_7
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_274 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0_1_0_a2_2_1,
I78/u1_isp8/u1_isp8_flow_cntl/intr_reg0$r68,
I78/u1_isp8/u1_isp8_flow_cntl/addr_jmp_reg_3
I75/SLICE_275 (PFU) covers blocks: I75/N_19_i,
I75/un1_Mico8_INT_1_sqmuxa_1_0_i_o4, I75/Mico8_INT
I78/SLICE_276 (PFU) covers blocks: I78/u1_isp8/u1_isp8_io_cntl/ext_io_rd_1_1,
I78/U2_scratchpad/LUT4_1, I78/U2_scratchpad/INV_0,
I78/u1_isp8/u1_isp8_io_cntl/ext_io_rd
I78/u1_isp8/SLICE_277 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_io_cntl/ext_io_wr_2, I78/u1_isp8/din_rd_sn_m2_0_a2,
I78/u1_isp8/u1_isp8_io_cntl/ext_io_wr
I77/SLICE_285 (PFU) covers blocks: I77/un1_timecounter_pulse_0_a2_10_4,
I77/nextUARTState_1_i_a2_0_1_0, I77/Data_Out_6, I77/Data_Out_7
I79/SLICE_289 (PFU) covers blocks: I79/un1_timecounter_pulse_0_a2_10_4,
I79/nextUARTState_1_i_a2_0_1_0, I79/Data_Out_6, I79/Data_Out_7
I65/serializer_Ser_Out_2_3_0_0/SLICE_290 (PFU) covers blocks:
I65/serializer_Ser_Out_2_3_0_0/GATE, I65/serializer_Ser_Out_2_3_0_0_am,
I65/serializer_Ser_Out_2_3_0_0_bm
I65/serializer_Ser_Out_2_6_0_0/SLICE_291 (PFU) covers blocks:
I65/serializer_Ser_Out_2_6_0_0/GATE, I65/serializer_Ser_Out_2_6_0_0_am,
I65/serializer_Ser_Out_2_6_0_0_bm
I75/Mico8_Data_i_1/SLICE_292 (PFU) covers blocks: I75/Mico8_Data_i_1/GATE,
I75/Mico8_Data_i_am_1, I75/Mico8_Data_i_bm_1
I78/u1_isp8/u1_isp8_alu/u1_addsub8/SLICE_293 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/u1_addsub8/XNOR2_t0,
I78/u1_isp8/u1_isp8_alu/adsu_ci_0
I72/SLICE_294 (PFU) covers blocks: I72/un1_timecounter13, I72/TxState_14
I78/u1_isp8/u1_isp8_alu/SLICE_295 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m2_i_m3_0_5,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_5/GATE
I78/u1_isp8/u1_isp8_alu/SLICE_296 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m2_i_m3_0_6,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_6/GATE
I78/u1_isp8/u1_isp8_alu/SLICE_297 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m3_0_1,
Page 20
Design: MICO8 Date: 03/14/08 11:43:15
Symbol Cross Reference (cont)
-----------------------------
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_1/GATE
I78/u1_isp8/u1_isp8_alu/SLICE_298 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m2_i_m3_0_2,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_2/GATE
I78/u1_isp8/u1_isp8_alu/SLICE_299 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m2_i_m3_0_3,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_3/GATE
I78/u1_isp8/u1_isp8_alu/SLICE_300 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_alu/data_rb_int_i_0_m2_i_m3_0_4,
I78/u1_isp8/GEN_REG_32_u1_isp8_rfmem/mux_4/GATE
I78/u1_isp8/u1_isp8_flow_cntl/SLICE_301 (PFU) covers blocks:
I78/u1_isp8/u1_isp8_flow_cntl/un1_addr_cyc_int_i_a2_d_0_2,
I78/u1_is
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -