📄 test_ram.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.1 06/12/2001
-- Compiled: 04/19/2008 16:54:51
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "test_ram"
BEGIN
DEVICE = "EPF10K20TC144-3";
"clk_cdu" : INPUT_PIN = 122 ;
"clr_cdu" : INPUT_PIN = 95 ;
"cp161ldar" : INPUT_PIN = 128 ;
"en_cdu" : INPUT_PIN = 92 ;
"LDAR" : INPUT_PIN = 72 ;
"MEMENAB" : INPUT_PIN = 79 ;
"pc_bus" : INPUT_PIN = 82 ;
"RD" : INPUT_PIN = 78 ;
"scan_clk" : INPUT_PIN = 125 ;
"sw_bus" : INPUT_PIN = 83 ;
"WE" : INPUT_PIN = 73 ;
"161clr" : INPUT_PIN = 86 ;
"161load" : INPUT_PIN = 87 ;
"161pc" : INPUT_PIN = 88 ;
"adr0" : OUTPUT_PIN = 21 ;
"adr1" : OUTPUT_PIN = 22 ;
"adr2" : OUTPUT_PIN = 23 ;
"adr3" : OUTPUT_PIN = 26 ;
"adr4" : OUTPUT_PIN = 27 ;
"adr5" : OUTPUT_PIN = 28 ;
"adr6" : OUTPUT_PIN = 29 ;
"adr7" : OUTPUT_PIN = 30 ;
"GW" : OUTPUT_PIN = 102 ;
"seg_a" : OUTPUT_PIN = 51 ;
"seg_b" : OUTPUT_PIN = 49 ;
"seg_c" : OUTPUT_PIN = 48 ;
"seg_d" : OUTPUT_PIN = 47 ;
"seg_e" : OUTPUT_PIN = 46 ;
"seg-f" : OUTPUT_PIN = 44 ;
"seg_g" : OUTPUT_PIN = 43 ;
"SW" : OUTPUT_PIN = 8 ;
"d0" : BIDIR_PIN = 9 ;
"d1" : BIDIR_PIN = 10 ;
"d2" : BIDIR_PIN = 12 ;
"d3" : BIDIR_PIN = 13 ;
"d4" : BIDIR_PIN = 17 ;
"d5" : BIDIR_PIN = 18 ;
"d6" : BIDIR_PIN = 19 ;
"d7" : BIDIR_PIN = 20 ;
"|BCD_7SEG:61|:456" : LOCATION = LC1_E16;
"|BCD_7SEG:61|:492" : LOCATION = LC3_E14;
"|BCD_7SEG:61|:528" : LOCATION = LC2_E16;
"|BCD_7SEG:61|:540" : LOCATION = LC3_E16;
"|BCD_7SEG:61|:545" : LOCATION = LC5_E17;
"|BCD_7SEG:61|~579~1" : LOCATION = LC6_E14;
"|BCD_7SEG:61|:591" : LOCATION = LC2_E17;
"|BCD_7SEG:61|:633" : LOCATION = LC7_E17;
"|BCD_7SEG:61|:639" : LOCATION = LC6_E17;
"|BCD_7SEG:61|:663" : LOCATION = LC8_E14;
"|BCD_7SEG:61|:680" : LOCATION = LC1_E14;
"|BCD_7SEG:61|:687" : LOCATION = LC8_E16;
"|BCD_7SEG:61|:734" : LOCATION = LC7_E16;
"|BCD_7SEG:61|:735" : LOCATION = LC6_E16;
"|BCD_7SEG:61|:755" : LOCATION = LC5_E14;
"|BCD_7SEG:61|:783" : LOCATION = LC2_E14;
"|BCD_7SEG:61|~783~1" : LOCATION = LC4_E14;
"|BCD_7SEG:61|~816~1" : LOCATION = LC7_E14;
"|BCD_7SEG:61|:824" : LOCATION = LC4_E16;
"|BCD_7SEG:61|~825~1" : LOCATION = LC5_E16;
"|BCD_7SEG:61|:831" : LOCATION = LC6_E13;
"|cdu16:74|74163:8|f74163:sub|:34" : LOCATION = LC6_B20; -- |cdu16:74|74163:8|f74163:sub|QA
"|cdu16:74|74163:8|f74163:sub|:106" : LOCATION = LC3_B20;
"|cdu16:74|74163:8|f74163:sub|:111" : LOCATION = LC5_B20; -- |cdu16:74|74163:8|f74163:sub|QB
"|cdu16:74|74163:8|f74163:sub|:122" : LOCATION = LC7_B20; -- |cdu16:74|74163:8|f74163:sub|QC
"|cdu16:74|74163:8|f74163:sub|:130" : LOCATION = LC4_B20;
"|cdu16:74|74163:8|f74163:sub|:134" : LOCATION = LC2_B19; -- |cdu16:74|74163:8|f74163:sub|QD
"|cdu16:75|74163:8|f74163:sub|:34" : LOCATION = LC6_B19; -- |cdu16:75|74163:8|f74163:sub|QA
"|cdu16:75|74163:8|f74163:sub|:111" : LOCATION = LC4_B19; -- |cdu16:75|74163:8|f74163:sub|QB
"|cdu16:75|74163:8|f74163:sub|:119" : LOCATION = LC5_B19;
"|cdu16:75|74163:8|f74163:sub|:122" : LOCATION = LC3_B19; -- |cdu16:75|74163:8|f74163:sub|QC
"|cdu16:75|74163:8|f74163:sub|:134" : LOCATION = LC1_B19; -- |cdu16:75|74163:8|f74163:sub|QD
"GW~1" : LOCATION = LC3_E17;
"|LPM_RAM_IO:57|datatri0~1~3" : LOCATION = LC3_B16;
"|LPM_RAM_IO:57|datatri0~1~3~2" : LOCATION = LC7_B18;
"|LPM_RAM_IO:57|datatri1~1~3" : LOCATION = LC8_B20;
"|LPM_RAM_IO:57|datatri1~1~3~2" : LOCATION = LC1_B20;
"|LPM_RAM_IO:57|datatri2~1~3" : LOCATION = LC2_B18;
"|LPM_RAM_IO:57|datatri2~1~3~2" : LOCATION = LC5_B18;
"|LPM_RAM_IO:57|datatri3~1~3" : LOCATION = LC2_B16;
"|LPM_RAM_IO:57|datatri3~1~3~2" : LOCATION = LC5_B16;
"|LPM_RAM_IO:57|datatri4~1~3" : LOCATION = LC4_B16;
"|LPM_RAM_IO:57|datatri4~1~3~2" : LOCATION = LC6_B16;
"|LPM_RAM_IO:57|datatri5~1~3" : LOCATION = LC1_B16;
"|LPM_RAM_IO:57|datatri5~1~3~2" : LOCATION = LC3_B24;
"|LPM_RAM_IO:57|datatri6~1~3" : LOCATION = LC3_B18;
"|LPM_RAM_IO:57|datatri6~1~3~2" : LOCATION = LC6_B18;
"|LPM_RAM_IO:57|datatri7~1~2" : LOCATION = LC1_B18;
"|LPM_RAM_IO:57|datatri7~1~3" : LOCATION = LC4_B18;
"|LPM_RAM_IO:57|datatri7~1~3~2" : LOCATION = LC8_B18;
"|LPM_RAM_IO:57|:91" : LOCATION = LC7_B16;
"|saomiao:62|74157:9|:22" : LOCATION = LC4_E17; -- |saomiao:62|74157:9|Y1
"|saomiao:62|74157:9|:23" : LOCATION = LC2_B20; -- |saomiao:62|74157:9|Y2
"|saomiao:62|74157:9|:24" : LOCATION = LC1_E17; -- |saomiao:62|74157:9|Y3
"|saomiao:62|74157:9|:25" : LOCATION = LC8_B19; -- |saomiao:62|74157:9|Y4
"SW~1" : LOCATION = LC8_E17;
":60" : LOCATION = LC7_B19;
":80" : LOCATION = LC3_B8 ;
":81" : LOCATION = LC6_D24;
"|74161:116|f74161:sub|:9" : LOCATION = LC3_B23; -- |74161:116|f74161:sub|QA
"|74161:116|f74161:sub|:84" : LOCATION = LC4_B23;
"|74161:116|f74161:sub|:87" : LOCATION = LC2_B23; -- |74161:116|f74161:sub|QB
"|74161:116|f74161:sub|:94" : LOCATION = LC6_B23;
"|74161:116|f74161:sub|:99" : LOCATION = LC1_B23; -- |74161:116|f74161:sub|QC
"|74161:116|f74161:sub|:104" : LOCATION = LC8_B23;
"|74161:116|f74161:sub|:110" : LOCATION = LC5_B23; -- |74161:116|f74161:sub|QD
"|74161:117|f74161:sub|:9" : LOCATION = LC4_B24; -- |74161:117|f74161:sub|QA
"|74161:117|f74161:sub|:80" : LOCATION = LC5_B24;
"|74161:117|f74161:sub|:84" : LOCATION = LC7_B24;
"|74161:117|f74161:sub|:87" : LOCATION = LC6_B24; -- |74161:117|f74161:sub|QB
"|74161:117|f74161:sub|:94" : LOCATION = LC8_B24;
"|74161:117|f74161:sub|:99" : LOCATION = LC2_B24; -- |74161:117|f74161:sub|QC
"|74161:117|f74161:sub|:110" : LOCATION = LC1_B24; -- |74161:117|f74161:sub|QD
"|74273:115|:12" : LOCATION = LC1_B8 ; -- |74273:115|Q8
"|74273:115|:13" : LOCATION = LC8_B8 ; -- |74273:115|Q7
"|74273:115|:14" : LOCATION = LC5_B5 ; -- |74273:115|Q6
"|74273:115|:15" : LOCATION = LC2_B8 ; -- |74273:115|Q5
"|74273:115|:16" : LOCATION = LC4_B8 ; -- |74273:115|Q4
"|74273:115|:17" : LOCATION = LC7_B8 ; -- |74273:115|Q3
"|74273:115|:18" : LOCATION = LC6_B8 ; -- |74273:115|Q2
"|74273:115|:19" : LOCATION = LC5_B8 ; -- |74273:115|Q1
"|LPM_RAM_IO:57|altram:sram|segment0_0" : LOCATION = EC4_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_1" : LOCATION = EC8_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_2" : LOCATION = EC6_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_3" : LOCATION = EC5_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_4" : LOCATION = EC2_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_5" : LOCATION = EC1_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_6" : LOCATION = EC3_B ;
"|LPM_RAM_IO:57|altram:sram|segment0_7" : LOCATION = EC7_B ;
END;
INTERNAL_INFO "test_ram"
BEGIN
DEVICE = EPF10K20TC144-3;
LC1_E16 : LORAX = "1:MSW0R4C15,HHR19R4|2:PA17R4C13->LC1_E14|,2:PA17R4C16->LC5_E17||";
LC2_E16 : LORAX = "1:MSW1R4C15,HHR12R4|2:PA3R4C12->LC6_E13|,2:PA3R4C13->LC4_E14|,2:PA3R4C16->LC5_E17,->LC6_E17||";
LC3_E16 : LORAX = "1:MSW2R4C15,HHR14R4|2:PA1R4C12->LC6_E13|,2:PA1R4C13->LC4_E14|,2:PA1R4C16->LC5_E17,->LC6_E17||";
LC5_E17 : LORAX = "1:MSW4R4C17,V12C17->OV2C17P43|";
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