📄 shiyan3gai2.pin
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-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "shiyan3gai2" ASSIGNED TO AN EPF10K20TC144-3
TCK : 1
CONF_DONE : 2
nCEO : 3
TDO : 4
VCCIO : 5
VCCINT : 6
RESERVED : 7
q0 : 8
d0 : 9
d1 : 10
RESERVED : 11
d2 : 12
d3 : 13
RESERVED : 14
GNDIO : 15
GNDINT : 16
d4 : 17
d5 : 18
d6 : 19
d7 : 20
adr0 : 21
adr1 : 22
adr2 : 23
VCCIO : 24
VCCINT : 25
adr3 : 26
adr4 : 27
adr5 : 28
adr6 : 29
adr7 : 30
RESERVED : 31
RESERVED : 32
RESERVED : 33
TMS : 34
nSTATUS : 35
RESERVED : 36
RESERVED : 37
RESERVED : 38
RESERVED : 39
GNDIO : 40
RESERVED : 41
RESERVED : 42
seg_g : 43
seg_f : 44
VCCIO : 45
seg_e : 46
seg_d : 47
seg_c : 48
seg_b : 49
GNDIO : 50
seg_a : 51
VCCINT : 52
VCCINT : 53
GNDINT : 54
GNDINT : 55
GNDINT : 56
GNDINT : 57
GNDINT : 58
RESERVED : 59
RESERVED : 60
VCCIO : 61
RESERVED : 62
RESERVED : 63
RESERVED : 64
RESERVED : 65
GNDIO : 66
RESERVED : 67
RESERVED : 68
RESERVED : 69
RESERVED : 70
VCCIO : 71
LDAR : 72
WE : 73
nCONFIG : 74
VCCINT : 75
MSEL1 : 76
MSEL0 : 77
RD : 78
MEMENAB : 79
RESERVED : 80
RESERVED : 81
pc_bus : 82
sw_bus : 83
GNDINT : 84
GNDIO : 85
161clr : 86
161load : 87
161pc : 88
RESERVED : 89
RESERVED : 90
scan_clr : 91
en_cdu : 92
VCCINT : 93
VCCIO : 94
clr_cdu : 95
RESERVED : 96
RESERVED : 97
RESERVED : 98
RESERVED : 99
RESERVED : 100
RESERVED : 101
q1 : 102
GNDINT : 103
GNDIO : 104
TDI : 105
nCE : 106
DCLK : 107
DATA0 : 108
RESERVED : 109
RESERVED : 110
RESERVED : 111
RESERVED : 112
RESERVED : 113
RESERVED : 114
VCCIO : 115
RESERVED : 116
RESERVED : 117
RESERVED : 118
RESERVED : 119
RESERVED : 120
RESERVED : 121
clk_cdu : 122
VCCINT : 123
GNDINT : 124
scan_clk : 125
GNDINT : 126
GNDINT : 127
RESERVED : 128
GNDIO : 129
RESERVED : 130
RESERVED : 131
RESERVED : 132
RESERVED : 133
VCCIO : 134
RESERVED : 135
RESERVED : 136
RESERVED : 137
RESERVED : 138
GNDIO : 139
RESERVED : 140
RESERVED : 141
RESERVED : 142
RESERVED : 143
RESERVED : 144
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