finish.rpt

用verilog语言写的拔河游戏机

-- Node name is '|74181:46|:82' 
-- Equation name is '_LC6_F21', type is buried 
_LC6_F21 = LCELL( _EQ061);
  _EQ061 =  _LC1_F20 &  _LC4_F20 &  M
         #  _LC1_F20 &  _LC4_F20 &  _LC5_F21
         # !_LC1_F20 & !_LC4_F20 &  M
         # !_LC1_F20 & !_LC4_F20 &  _LC5_F21
         # !_LC1_F20 &  _LC4_F20 & !_LC5_F21 & !M
         #  _LC1_F20 & !_LC4_F20 & !_LC5_F21 & !M;

-- Node name is '|74181:47|~78~1' = '|74181:47|CN4~1' 
-- Equation name is '_LC1_F17', type is buried 
-- synthesized logic cell 
_LC1_F17 = LCELL( _EQ062);
  _EQ062 = !CN & !_LC2_F17
         # !_LC2_F17 & !_LC6_F22;

-- Node name is '|74181:47|~78~2' = '|74181:47|CN4~2' 
-- Equation name is '_LC4_F15', type is buried 
-- synthesized logic cell 
_LC4_F15 = LCELL( _EQ063);
  _EQ063 = !_LC5_F18 & !_LC6_F18
         #  _LC1_F17 & !_LC6_F18;

-- Node name is '|74181:47|~78~3' = '|74181:47|CN4~3' 
-- Equation name is '_LC1_F15', type is buried 
-- synthesized logic cell 
_LC1_F15 = LCELL( _EQ064);
  _EQ064 =  _LC4_F15
         # !_LC3_F15;

-- Node name is '|74181:47|:78' = '|74181:47|CN4' 
-- Equation name is '_LC4_F23', type is buried 
!_LC4_F23 = _LC4_F23~NOT;
_LC4_F23~NOT = LCELL( _EQ065);
  _EQ065 =  _LC1_F15 & !_LC2_F15 & !_LC3_F23
         # !_LC3_F23 & !_LC6_F16;

-- Node name is '|74181:47|:43' 
-- Equation name is '_LC2_F17', type is buried 
!_LC2_F17 = _LC2_F17~NOT;
_LC2_F17~NOT = LCELL( _EQ066);
  _EQ066 =  _LC4_F16
         # !_LC1_F16 &  _LC8_F18
         #  _LC1_F16 &  _LC4_F18;

-- Node name is '|74181:47|:44' 
-- Equation name is '_LC6_F18', type is buried 
!_LC6_F18 = _LC6_F18~NOT;
_LC6_F18~NOT = LCELL( _EQ067);
  _EQ067 =  _LC8_F14
         # !_LC7_F14 &  _LC8_F18
         #  _LC4_F18 &  _LC7_F14;

-- Node name is '|74181:47|:45' 
-- Equation name is '_LC2_F15', type is buried 
!_LC2_F15 = _LC2_F15~NOT;
_LC2_F15~NOT = LCELL( _EQ068);
  _EQ068 =  _LC7_F15
         # !_LC8_F15 &  _LC8_F18
         #  _LC4_F18 &  _LC8_F15;

-- Node name is '|74181:47|:46' 
-- Equation name is '_LC6_F22', type is buried 
!_LC6_F22 = _LC6_F22~NOT;
_LC6_F22~NOT = LCELL( _EQ069);
  _EQ069 = !_LC1_F16 &  _LC1_F18 &  _LC4_F16
         #  _LC1_F16 &  _LC2_F18 &  _LC4_F16;

-- Node name is '|74181:47|:47' 
-- Equation name is '_LC5_F18', type is buried 
!_LC5_F18 = _LC5_F18~NOT;
_LC5_F18~NOT = LCELL( _EQ070);
  _EQ070 =  _LC1_F18 & !_LC7_F14 &  _LC8_F14
         #  _LC2_F18 &  _LC7_F14 &  _LC8_F14;

-- Node name is '|74181:47|:48' 
-- Equation name is '_LC3_F15', type is buried 
!_LC3_F15 = _LC3_F15~NOT;
_LC3_F15~NOT = LCELL( _EQ071);
  _EQ071 =  _LC1_F18 &  _LC7_F15 & !_LC8_F15
         #  _LC2_F18 &  _LC7_F15 &  _LC8_F15;

-- Node name is '|74181:47|:51' 
-- Equation name is '_LC3_F23', type is buried 
_LC3_F23 = LCELL( _EQ072);
  _EQ072 = !_LC3_F16 & !_LC4_F18 & !_LC8_F18
         # !_LC3_F16 & !_LC4_F18 &  _LC8_F13
         # !_LC3_F16 & !_LC8_F13 & !_LC8_F18;

-- Node name is '|74181:47|:52' 
-- Equation name is '_LC6_F16', type is buried 
_LC6_F16 = LCELL( _EQ073);
  _EQ073 = !_LC3_F16
         # !_LC1_F18 & !_LC2_F18
         # !_LC2_F18 &  _LC8_F13
         # !_LC1_F18 & !_LC8_F13;

-- Node name is '|74181:47|:74' 
-- Equation name is '_LC2_F23', type is buried 
_LC2_F23 = LCELL( _EQ074);
  _EQ074 =  M
         #  _LC1_F15 & !_LC2_F15;

-- Node name is '|74181:47|~80~1' 
-- Equation name is '_LC5_F17', type is buried 
-- synthesized logic cell 
_LC5_F17 = LCELL( _EQ075);
  _EQ075 = !_LC6_F22 &  M
         # !CN & !_LC6_F22
         #  CN &  _LC6_F22 & !M;

-- Node name is '|74181:47|:81' 
-- Equation name is '_LC3_F18', type is buried 
_LC3_F18 = LCELL( _EQ076);
  _EQ076 =  _LC5_F18 &  _LC6_F18 &  M
         #  _LC1_F17 &  _LC5_F18 &  _LC6_F18
         # !_LC5_F18 & !_LC6_F18 &  M
         #  _LC1_F17 & !_LC5_F18 & !_LC6_F18
         # !_LC1_F17 &  _LC5_F18 & !_LC6_F18 & !M
         # !_LC1_F17 & !_LC5_F18 &  _LC6_F18 & !M;

-- Node name is '|74181:47|:82' 
-- Equation name is '_LC5_F15', type is buried 
_LC5_F15 = LCELL( _EQ077);
  _EQ077 =  _LC2_F15 &  _LC3_F15 &  M
         #  _LC2_F15 &  _LC3_F15 &  _LC4_F15
         # !_LC2_F15 & !_LC3_F15 &  M
         # !_LC2_F15 & !_LC3_F15 &  _LC4_F15
         # !_LC2_F15 &  _LC3_F15 & !_LC4_F15 & !M
         #  _LC2_F15 & !_LC3_F15 & !_LC4_F15 & !M;

-- Node name is '|74244:48|~1~1~3~2' 
-- Equation name is '_LC4_F17', type is buried 
-- synthesized logic cell 
_LC4_F17 = LCELL( _EQ078);
  _EQ078 =  R5_BUS &  SW_BUS
         #  _LC7_F17 &  SW_BUS
         #  _LC6_F11 &  R5_BUS
         #  _LC6_F11 &  _LC7_F17;

-- Node name is '|74244:48|~1~1~3' 
-- Equation name is '_LC3_F17', type is buried 
_LC3_F17 = LCELL( _EQ079);
  _EQ079 =  _LC4_F17 &  _LC6_F17 &  R4_BUS
         #  _LC4_F17 &  _LC6_F17 &  _LC8_F17;

-- Node name is '|74244:48|~1~2' 
-- Equation name is '_LC6_F17', type is buried 
_LC6_F17 = LCELL( _EQ080);
  _EQ080 =  ALU_BUS
         # !_LC2_F17 &  _LC5_F17
         #  _LC2_F17 & !_LC5_F17;

-- Node name is '|74244:48|~6~1~3~2' 
-- Equation name is '_LC2_F8', type is buried 
-- synthesized logic cell 
_LC2_F8  = LCELL( _EQ081);
  _EQ081 =  R5_BUS &  SW_BUS
         #  _LC5_F8 &  SW_BUS
         #  _LC1_F11 &  R5_BUS
         #  _LC1_F11 &  _LC5_F8;

-- Node name is '|74244:48|~6~1~3~3' 
-- Equation name is '_LC4_F8', type is buried 
-- synthesized logic cell 
_LC4_F8  = LCELL( _EQ082);
  _EQ082 =  _LC2_F8 &  R4_BUS
         #  _LC2_F8 &  _LC6_F8;

-- Node name is '|74244:48|~6~1~3' 
-- Equation name is '_LC8_F8', type is buried 
_LC8_F8  = LCELL( _EQ083);
  _EQ083 =  ALU_BUS &  _LC4_F8
         #  _LC3_F18 &  _LC4_F8;

-- Node name is '|74244:48|~10~1~3~2' 
-- Equation name is '_LC3_F11', type is buried 
-- synthesized logic cell 
_LC3_F11 = LCELL( _EQ084);
  _EQ084 =  R5_BUS &  SW_BUS
         #  _LC3_F4 &  SW_BUS
         #  _LC7_F11 &  R5_BUS
         #  _LC3_F4 &  _LC7_F11;

-- Node name is '|74244:48|~10~1~3~3' 
-- Equation name is '_LC4_F2', type is buried 
-- synthesized logic cell 
_LC4_F2  = LCELL( _EQ085);
  _EQ085 =  _LC3_F11 &  R4_BUS
         #  _LC1_F2 &  _LC3_F11;

-- Node name is '|74244:48|~10~1~3' 
-- Equation name is '_LC6_F15', type is buried 
_LC6_F15 = LCELL( _EQ086);
  _EQ086 =  ALU_BUS &  _LC4_F2
         #  _LC4_F2 &  _LC5_F15;

-- Node name is '|74244:48|~11~1~3~2' 
-- Equation name is '_LC1_F23', type is buried 
-- synthesized logic cell 
_LC1_F23 = LCELL( _EQ087);
  _EQ087 =  R5_BUS &  SW_BUS
         #  _LC6_F23 &  SW_BUS
         #  _LC4_F3 &  R5_BUS
         #  _LC4_F3 &  _LC6_F23;

-- Node name is '|74244:48|~11~1~3' 
-- Equation name is '_LC8_F23', type is buried 
_LC8_F23 = LCELL( _EQ088);
  _EQ088 =  _LC1_F23 &  _LC5_F23 &  R4_BUS
         #  _LC1_F23 &  _LC5_F23 &  _LC7_F23;

-- Node name is '|74244:48|~11~2' 
-- Equation name is '_LC5_F23', type is buried 
_LC5_F23 = LCELL( _EQ089);
  _EQ089 =  ALU_BUS
         #  _LC2_F23 &  _LC3_F23 &  _LC6_F16
         #  _LC2_F23 & !_LC3_F23 & !_LC6_F16
         # !_LC2_F23 &  _LC3_F23 & !_LC6_F16
         # !_LC2_F23 & !_LC3_F23 &  _LC6_F16;

-- Node name is '|74244:48|~26~1~3~2' 
-- Equation name is '_LC1_F19', type is buried 
-- synthesized logic cell 
_LC1_F19 = LCELL( _EQ090);
  _EQ090 =  R5_BUS &  SW_BUS
         #  _LC1_F5 &  SW_BUS
         #  _LC8_F3 &  R5_BUS
         #  _LC1_F5 &  _LC8_F3;

-- Node name is '|74244:48|~26~1~3' 
-- Equation name is '_LC8_F19', type is buried 
_LC8_F19 = LCELL( _EQ091);
  _EQ091 =  _LC1_F19 &  _LC6_F19 &  _LC7_F19
         #  _LC1_F19 &  _LC6_F19 &  R4_BUS;

-- Node name is '|74244:48|~26~2' 
-- Equation name is '_LC6_F19', type is buried 
_LC6_F19 = LCELL( _EQ092);
  _EQ092 =  ALU_BUS
         #  _LC2_F19 &  _LC3_F19 &  _LC4_F19
         # !_LC2_F19 & !_LC3_F19 &  _LC4_F19
         # !_LC2_F19 &  _LC3_F19 & !_LC4_F19
         #  _LC2_F19 & !_LC3_F19 & !_LC4_F19;

-- Node name is '|74244:48|~27~1~3~2' 
-- Equation name is '_LC3_F21', type is buried 
-- synthesized logic cell 
_LC3_F21 = LCELL( _EQ093);
  _EQ093 =  R5_BUS &  SW_BUS
         #  _LC7_F21 &  SW_BUS
         #  _LC5_F3 &  R5_BUS
         #  _LC5_F3 &  _LC7_F21;

-- Node name is '|74244:48|~27~1~3' 
-- Equation name is '_LC1_F21', type is buried 
_LC1_F21 = LCELL( _EQ094);
  _EQ094 =  ALU_BUS &  _LC3_F21 &  _LC4_F21
         #  _LC3_F21 &  _LC4_F21 &  _LC6_F21;

-- Node name is '|74244:48|~31~1~2' 
-- Equation name is '_LC1_F22', type is buried 
_LC1_F22 = LCELL( _EQ095);
  _EQ095 = !SW_BUS
         # !ALU_BUS
         # !R4_BUS
         # !R5_BUS;

-- Node name is '|74244:48|~31~1~3~2' 
-- Equation name is '_LC2_F22', type is buried 
-- synthesized logic cell 
_LC2_F22 = LCELL( _EQ096);
  _EQ096 =  R5_BUS &  SW_BUS
         #  _LC5_F22 &  SW_BUS
         #  _LC3_F3 &  R5_BUS
         #  _LC3_F3 &  _LC5_F22;

-- Node name is '|74244:48|~31~1~3~3' 
-- Equation name is '_LC3_F22', type is buried 
-- synthesized logic cell 
_LC3_F22 = LCELL( _EQ097);
  _EQ097 =  _LC2_F22 &  R4_BUS
         #  _LC2_F22 &  _LC7_F22;

-- Node nam