📄 databusjiben.pin
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-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "databusjiben" ASSIGNED TO AN EPF10K20TC144-3
TCK : 1
CONF_DONE : 2
nCEO : 3
TDO : 4
VCCIO : 5
VCCINT : 6
adr5 : 7
RESERVED : 8
dout0 : 9
dout1 : 10
RESERVED : 11
RESERVED : 12
adr1 : 13
RESERVED : 14
GNDIO : 15
GNDINT : 16
RESERVED : 17
RESERVED : 18
adr6 : 19
adr2 : 20
RESERVED : 21
RESERVED : 22
RESERVED : 23
VCCIO : 24
VCCINT : 25
RESERVED : 26
RESERVED : 27
RESERVED : 28
RESERVED : 29
RESERVED : 30
RESERVED : 31
RESERVED : 32
RESERVED : 33
TMS : 34
nSTATUS : 35
RESERVED : 36
RESERVED : 37
adr7 : 38
adr3 : 39
GNDIO : 40
RESERVED : 41
pc_bus : 42
LDR4 : 43
RESERVED : 44
VCCIO : 45
RESERVED : 46
inputd1 : 47
cpldar : 48
WE : 49
GNDIO : 50
dout3 : 51
VCCINT : 52
VCCINT : 53
161clr : 54
clk_cdu : 55
R4_BUS : 56
GNDINT : 57
GNDINT : 58
RESERVED : 59
RESERVED : 60
VCCIO : 61
CP_T : 62
inputd5 : 63
cn4 : 64
s2 : 65
GNDIO : 66
s0 : 67
161load : 68
s1 : 69
RESERVED : 70
VCCIO : 71
RESERVED : 72
RESERVED : 73
nCONFIG : 74
VCCINT : 75
MSEL1 : 76
MSEL0 : 77
RESERVED : 78
RESERVED : 79
RESERVED : 80
161pc : 81
ALU_BUS : 82
RESERVED : 83
GNDINT : 84
GNDIO : 85
RESERVED : 86
RESERVED : 87
RESERVED : 88
RESERVED : 89
RESERVED : 90
RESERVED : 91
RESERVED : 92
VCCINT : 93
VCCIO : 94
dout7 : 95
dout4 : 96
dout6 : 97
dout2 : 98
dout5 : 99
RESERVED : 100
RESERVED : 101
RESERVED : 102
GNDINT : 103
GNDIO : 104
TDI : 105
nCE : 106
DCLK : 107
DATA0 : 108
RESERVED : 109
inputd4 : 110
s3 : 111
RESERVED : 112
inputd7 : 113
inputd6 : 114
VCCIO : 115
LDDR2 : 116
enable : 117
RESERVED : 118
inputd2 : 119
LDDR1 : 120
sw_bus : 121
RESERVED : 122
VCCINT : 123
RD : 124
M : 125
R5_BUS : 126
GNDINT : 127
CN : 128
GNDIO : 129
RESERVED : 130
RESERVED : 131
RESERVED : 132
RESERVED : 133
VCCIO : 134
inputd3 : 135
inputd0 : 136
LDR5 : 137
adr0 : 138
GNDIO : 139
adr4 : 140
LDAR : 141
RESERVED : 142
RESERVED : 143
RESERVED : 144
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