shiyan3gai2.rpt

用verilog语言写的拔河游戏机

10:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
12:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
13:      4/24( 16%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
14:      7/24( 29%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
15:      5/24( 20%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
16:      6/24( 25%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
17:      2/24(  8%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
18:      3/24( 12%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
19:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
20:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
21:      4/24( 16%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
22:      5/24( 20%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
23:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
24:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                        d:\shiyan3\shiyan3gai2.rpt
shiyan3gai2

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       18         clk_cdu
LCELL        8         :27
LCELL        8         :32
INPUT        2         scan_clk


Device-Specific Information:                        d:\shiyan3\shiyan3gai2.rpt
shiyan3gai2

** CLEAR SIGNALS **

Type     Fan-out       Name
INPUT        8         clr_cdu
INPUT        8         161clr
INPUT        2         scan_clr


Device-Specific Information:                        d:\shiyan3\shiyan3gai2.rpt
shiyan3gai2

** EQUATIONS **

clk_cdu  : INPUT;
clr_cdu  : INPUT;
en_cdu   : INPUT;
LDAR     : INPUT;
MEMENAB  : INPUT;
pc_bus   : INPUT;
RD       : INPUT;
scan_clk : INPUT;
scan_clr : INPUT;
sw_bus   : INPUT;
WE       : INPUT;
161clr   : INPUT;
161load  : INPUT;
161pc    : INPUT;

-- Node name is 'adr0' 
-- Equation name is 'adr0', type is output 
adr0     =  _LC5_C13;

-- Node name is 'adr1' 
-- Equation name is 'adr1', type is output 
adr1     =  _LC6_C13;

-- Node name is 'adr2' 
-- Equation name is 'adr2', type is output 
adr2     =  _LC7_C20;

-- Node name is 'adr3' 
-- Equation name is 'adr3', type is output 
adr3     =  _LC1_C13;

-- Node name is 'adr4' 
-- Equation name is 'adr4', type is output 
adr4     =  _LC3_C13;

-- Node name is 'adr5' 
-- Equation name is 'adr5', type is output 
adr5     =  _LC5_C22;

-- Node name is 'adr6' 
-- Equation name is 'adr6', type is output 
adr6     =  _LC8_C13;

-- Node name is 'adr7' 
-- Equation name is 'adr7', type is output 
adr7     =  _LC2_C13;

-- Node name is 'd0' 
-- Equation name is 'd0', type is bidir 
d0       = TRI(_LC3_C16,  _LC1_C15);

-- Node name is 'd1' 
-- Equation name is 'd1', type is bidir 
d1       = TRI(_LC8_C16,  _LC1_C15);

-- Node name is 'd2' 
-- Equation name is 'd2', type is bidir 
d2       = TRI(_LC2_C15,  _LC1_C15);

-- Node name is 'd3' 
-- Equation name is 'd3', type is bidir 
d3       = TRI(_LC3_C21,  _LC1_C15);

-- Node name is 'd4' 
-- Equation name is 'd4', type is bidir 
d4       = TRI(_LC1_C21,  _LC1_C15);

-- Node name is 'd5' 
-- Equation name is 'd5', type is bidir 
d5       = TRI(_LC2_C21,  _LC1_C15);

-- Node name is 'd6' 
-- Equation name is 'd6', type is bidir 
d6       = TRI(_LC3_C15,  _LC1_C15);

-- Node name is 'd7' 
-- Equation name is 'd7', type is bidir 
d7       = TRI(_LC4_C15,  _LC1_C15);

-- Node name is 'q0' 
-- Equation name is 'q0', type is output 
q0       =  _LC7_C22;

-- Node name is 'q1' 
-- Equation name is 'q1', type is output 
q1       =  _LC2_C22;

-- Node name is 'seg_a' 
-- Equation name is 'seg_a', type is output 
seg_a    =  _LC5_D14;

-- Node name is 'seg_b' 
-- Equation name is 'seg_b', type is output 
seg_b    =  _LC1_D14;

-- Node name is 'seg_c' 
-- Equation name is 'seg_c', type is output 
seg_c    =  _LC8_D15;

-- Node name is 'seg_d' 
-- Equation name is 'seg_d', type is output 
seg_d    =  _LC8_D16;

-- Node name is 'seg_e' 
-- Equation name is 'seg_e', type is output 
seg_e    =  _LC2_D18;

-- Node name is 'seg_f' 
-- Equation name is 'seg_f', type is output 
seg_f    =  _LC4_D17;

-- Node name is 'seg_g' 
-- Equation name is 'seg_g', type is output 
seg_g    =  _LC1_D18;

-- Node name is '|LPM_RAM_IO:57|:91' from file "lpm_ram_io.tdf" line 187, column 27
-- Equation name is '_LC6_C15', type is buried 
_LC6_C15 = LCELL( _EQ001);
  _EQ001 =  MEMENAB & !RD &  WE;

-- Node name is '|scan:40|:34' 
-- Equation name is '_LC7_C22', type is buried 
_LC7_C22 = DFFE(!_LC7_C22, GLOBAL( scan_clk),  scan_clr,  VCC,  VCC);

-- Node name is '|scan:40|:42' 
-- Equation name is '_LC2_C22', type is buried 
_LC2_C22 = DFFE( _EQ002, GLOBAL( scan_clk),  scan_clr,  VCC,  VCC);
  _EQ002 = !_LC2_C22 &  _LC7_C22;

-- Node name is '|scan:40|:64' 
-- Equation name is '_LC6_C22', type is buried 
_LC6_C22 = LCELL( _EQ003);
  _EQ003 = !_LC2_C22 &  _LC3_C23 &  _LC7_C22
         #  _LC2_C22 & !_LC7_C22 &  _LC7_C23;

-- Node name is '|scan:40|:65' 
-- Equation name is '_LC8_C22', type is buried 
_LC8_C22 = LCELL( _EQ004);
  _EQ004 = !_LC2_C22 &  _LC5_C16 &  _LC7_C22
         #  _LC2_C22 &  _LC2_C23 & !_LC7_C22;

-- Node name is '|scan:40|:66' 
-- Equation name is '_LC2_C16', type is buried 
_LC2_C16 = LCELL( _EQ005);
  _EQ005 = !_LC2_C22 &  _LC6_C16 &  _LC7_C22
         #  _LC1_C23 &  _LC2_C22 & !_LC7_C22;

-- Node name is '|scan:40|:67' 
-- Equation name is '_LC1_C22', type is buried 
!_LC1_C22 = _LC1_C22~NOT;
_LC1_C22~NOT = LCELL( _EQ006);
  _EQ006 =  _LC2_C22 &  _LC7_C22
         # !_LC4_C16 &  _LC7_C22
         # !_LC2_C22 & !_LC7_C22
         # !_LC2_C22 & !_LC4_C16
         # !_LC6_C23 & !_LC7_C22
         #  _LC2_C22 & !_LC6_C23
         # !_LC4_C16 & !_LC6_C23;

-- Node name is '|scan:40|:92' 
-- Equation name is '_LC6_D18', type is buried 
_LC6_D18 = LCELL( _EQ007);
  _EQ007 = !_LC1_C22 &  _LC2_C16 & !_LC6_C22 & !_LC8_C22;

-- Node name is '|scan:40|:104' 
-- Equation name is '_LC6_D17', type is buried 
_LC6_D17 = LCELL( _EQ008);
  _EQ008 =  _LC1_C22 &  _LC2_C16 & !_LC6_C22 & !_LC8_C22;

-- Node name is '|scan:40|:116' 
-- Equation name is '_LC8_D17', type is buried 
_LC8_D17 = LCELL( _EQ009);
  _EQ009 = !_LC1_C22 & !_LC2_C16 & !_LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|:128' 
-- Equation name is '_LC4_D15', type is buried 
_LC4_D15 = LCELL( _EQ010);
  _EQ010 =  _LC1_C22 & !_LC2_C16 & !_LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|:152' 
-- Equation name is '_LC7_D15', type is buried 
_LC7_D15 = LCELL( _EQ011);
  _EQ011 =  _LC1_C22 &  _LC2_C16 & !_LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|:176' 
-- Equation name is '_LC1_D17', type is buried 
_LC1_D17 = LCELL( _EQ012);
  _EQ012 =  _LC1_C22 & !_LC2_C16 &  _LC6_C22 & !_LC8_C22;

-- Node name is '|scan:40|:224' 
-- Equation name is '_LC2_D15', type is buried 
_LC2_D15 = LCELL( _EQ013);
  _EQ013 =  _LC1_C22 & !_LC2_C16 &  _LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|:236' 
-- Equation name is '_LC3_D18', type is buried 
_LC3_D18 = LCELL( _EQ014);
  _EQ014 = !_LC1_C22 &  _LC2_C16 &  _LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|:248' 
-- Equation name is '_LC4_D18', type is buried 
_LC4_D18 = LCELL( _EQ015);
  _EQ015 =  _LC1_C22 &  _LC2_C16 &  _LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|~283~1' 
-- Equation name is '_LC5_D15', type is buried 
-- synthesized logic cell 
_LC5_D15 = LCELL( _EQ016);
  _EQ016 =  _LC2_C16 &  _LC6_C22 &  _LC8_C22
         # !_LC1_C22 &  _LC2_C16 &  _LC8_C22
         # !_LC1_C22 &  _LC6_C22 &  _LC8_C22;

-- Node name is '|scan:40|:283' 
-- Equation name is '_LC5_D14', type is buried 
_LC5_D14 = LCELL( _EQ017);
  _EQ017 =  _LC4_D15
         #  _LC3_D15
         #  _LC5_D15;

-- Node name is '|scan:40|~286~1' 
-- Equation name is '_LC3_D15', type is buried 
-- synthesized logic cell 
_LC3_D15 = LCELL( _EQ018);
  _EQ018 =  _LC1_C22 &  _LC2_C16 & !_LC6_C22
         # !_LC1_C22 & !_LC8_C22
         # !_LC2_C16 &  _LC6_C22 & !_LC8_C22;

-- Node name is '|scan:40|~286~2' 
-- Equation name is '_LC1_D15', type is buried 
-- synthesized logic cell 
_LC1_D15 = LCELL( _EQ019);
  _EQ019 = !_LC1_C22 & !_LC2_C16 & !_LC6_C22 &  _LC8_C22
         #  _LC1_C22 & !_LC2_C16 & !_LC6_C22 & !_LC8_C22;

-- Node name is '|scan:40|:286'