full_adder.map.summary

来自「实现一位加法器的设计」· SUMMARY 代码 · 共 15 行

Analysis & Synthesis Status : Successful - Tue Jun 25 02:45:38 2002
Quartus II Version : 7.2 Build 203 02/05/2008 SP 2 SJ Full Version
Revision Name : full_adder
Top-level Entity Name : full_adder
Family : Cyclone II
Total logic elements : 2
    Total combinational functions : 2
    Dedicated logic registers : 0
Total registers : 0
Total pins : 8
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0