📄 sclock.tan.qmsg
字号:
{ "Info" "ITDB_TSU_RESULT" "segmain:inst1\|count\[13\] rst clk 5.399 ns register " "Info: tsu for register \"segmain:inst1\|count\[13\]\" (data pin = \"rst\", clock pin = \"clk\") is 5.399 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.213 ns + Longest pin register " "Info: + Longest pin to register delay is 8.213 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.004 ns) 1.004 ns rst 1 PIN PIN_206 60 " "Info: 1: + IC(0.000 ns) + CELL(1.004 ns) = 1.004 ns; Loc. = PIN_206; Fanout = 60; PIN Node = 'rst'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "" { rst } "NODE_NAME" } } { "sclock.bdf" "" { Schematic "E:/project/qii/yg2c58eb/ep2c5_project/sclock/sclock.bdf" { { 168 -136 32 184 "rst" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.549 ns) + CELL(0.660 ns) 8.213 ns segmain:inst1\|count\[13\] 2 REG LCFF_X6_Y5_N29 12 " "Info: 2: + IC(6.549 ns) + CELL(0.660 ns) = 8.213 ns; Loc. = LCFF_X6_Y5_N29; Fanout = 12; REG Node = 'segmain:inst1\|count\[13\]'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "7.209 ns" { rst segmain:inst1|count[13] } "NODE_NAME" } } { "segmain.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/segmain.v" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.664 ns ( 20.26 % ) " "Info: Total cell delay = 1.664 ns ( 20.26 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.549 ns ( 79.74 % ) " "Info: Total interconnect delay = 6.549 ns ( 79.74 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "8.213 ns" { rst segmain:inst1|count[13] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "8.213 ns" { rst {} rst~combout {} segmain:inst1|count[13] {} } { 0.000ns 0.000ns 6.549ns } { 0.000ns 1.004ns 0.660ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "segmain.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/segmain.v" 14 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.774 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.774 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "sclock.bdf" "" { Schematic "E:/project/qii/yg2c58eb/ep2c5_project/sclock/sclock.bdf" { { 136 -136 32 152 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.143 ns) + CELL(0.000 ns) 1.283 ns clk~clkctrl 2 COMB CLKCTRL_G2 47 " "Info: 2: + IC(0.143 ns) + CELL(0.000 ns) = 1.283 ns; Loc. = CLKCTRL_G2; Fanout = 47; COMB Node = 'clk~clkctrl'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.143 ns" { clk clk~clkctrl } "NODE_NAME" } } { "sclock.bdf" "" { Schematic "E:/project/qii/yg2c58eb/ep2c5_project/sclock/sclock.bdf" { { 136 -136 32 152 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.825 ns) + CELL(0.666 ns) 2.774 ns segmain:inst1\|count\[13\] 3 REG LCFF_X6_Y5_N29 12 " "Info: 3: + IC(0.825 ns) + CELL(0.666 ns) = 2.774 ns; Loc. = LCFF_X6_Y5_N29; Fanout = 12; REG Node = 'segmain:inst1\|count\[13\]'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.491 ns" { clk~clkctrl segmain:inst1|count[13] } "NODE_NAME" } } { "segmain.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/segmain.v" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.806 ns ( 65.10 % ) " "Info: Total cell delay = 1.806 ns ( 65.10 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.968 ns ( 34.90 % ) " "Info: Total interconnect delay = 0.968 ns ( 34.90 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "2.774 ns" { clk clk~clkctrl segmain:inst1|count[13] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "2.774 ns" { clk {} clk~combout {} clk~clkctrl {} segmain:inst1|count[13] {} } { 0.000ns 0.000ns 0.143ns 0.825ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "8.213 ns" { rst segmain:inst1|count[13] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "8.213 ns" { rst {} rst~combout {} segmain:inst1|count[13] {} } { 0.000ns 0.000ns 6.549ns } { 0.000ns 1.004ns 0.660ns } "" } } { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "2.774 ns" { clk clk~clkctrl segmain:inst1|count[13] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "2.774 ns" { clk {} clk~combout {} clk~clkctrl {} segmain:inst1|count[13] {} } { 0.000ns 0.000ns 0.143ns 0.825ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk seg_data\[0\] counter:inst2\|scount\[3\] 27.062 ns register " "Info: tco from clock \"clk\" to destination pin \"seg_data\[0\]\" through register \"counter:inst2\|scount\[3\]\" is 27.062 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 5.745 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 5.745 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "sclock.bdf" "" { Schematic "E:/project/qii/yg2c58eb/ep2c5_project/sclock/sclock.bdf" { { 136 -136 32 152 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.933 ns) + CELL(0.970 ns) 3.043 ns div:inst\|clk_out 2 REG LCFF_X1_Y5_N11 6 " "Info: 2: + IC(0.933 ns) + CELL(0.970 ns) = 3.043 ns; Loc. = LCFF_X1_Y5_N11; Fanout = 6; REG Node = 'div:inst\|clk_out'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.903 ns" { clk div:inst|clk_out } "NODE_NAME" } } { "div.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/div.v" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.188 ns) + CELL(0.000 ns) 4.231 ns div:inst\|clk_out~clkctrl 3 COMB CLKCTRL_G0 12 " "Info: 3: + IC(1.188 ns) + CELL(0.000 ns) = 4.231 ns; Loc. = CLKCTRL_G0; Fanout = 12; COMB Node = 'div:inst\|clk_out~clkctrl'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.188 ns" { div:inst|clk_out div:inst|clk_out~clkctrl } "NODE_NAME" } } { "div.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/div.v" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.848 ns) + CELL(0.666 ns) 5.745 ns counter:inst2\|scount\[3\] 4 REG LCFF_X20_Y10_N27 12 " "Info: 4: + IC(0.848 ns) + CELL(0.666 ns) = 5.745 ns; Loc. = LCFF_X20_Y10_N27; Fanout = 12; REG Node = 'counter:inst2\|scount\[3\]'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.514 ns" { div:inst|clk_out~clkctrl counter:inst2|scount[3] } "NODE_NAME" } } { "counter.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/counter.v" 27 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.776 ns ( 48.32 % ) " "Info: Total cell delay = 2.776 ns ( 48.32 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.969 ns ( 51.68 % ) " "Info: Total interconnect delay = 2.969 ns ( 51.68 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "5.745 ns" { clk div:inst|clk_out div:inst|clk_out~clkctrl counter:inst2|scount[3] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "5.745 ns" { clk {} clk~combout {} div:inst|clk_out {} div:inst|clk_out~clkctrl {} counter:inst2|scount[3] {} } { 0.000ns 0.000ns 0.933ns 1.188ns 0.848ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" { } { { "counter.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/counter.v" 27 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "21.013 ns + Longest register pin " "Info: + Longest register to pin delay is 21.013 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns counter:inst2\|scount\[3\] 1 REG LCFF_X20_Y10_N27 12 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X20_Y10_N27; Fanout = 12; REG Node = 'counter:inst2\|scount\[3\]'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "" { counter:inst2|scount[3] } "NODE_NAME" } } { "counter.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/counter.v" 27 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.091 ns) + CELL(0.596 ns) 1.687 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[1\]~11 2 COMB LCCOMB_X22_Y10_N22 2 " "Info: 2: + IC(1.091 ns) + CELL(0.596 ns) = 1.687 ns; Loc. = LCCOMB_X22_Y10_N22; Fanout = 2; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[1\]~11'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.687 ns" { counter:inst2|scount[3] counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[1]~11 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.773 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[2\]~13 3 COMB LCCOMB_X22_Y10_N24 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 1.773 ns; Loc. = LCCOMB_X22_Y10_N24; Fanout = 2; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[2\]~13'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[1]~11 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[2]~13 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.859 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[3\]~15 4 COMB LCCOMB_X22_Y10_N26 1 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 1.859 ns; Loc. = LCCOMB_X22_Y10_N26; Fanout = 1; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[3\]~15'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[2]~13 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[3]~15 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 2.365 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[4\]~16 5 COMB LCCOMB_X22_Y10_N28 10 " "Info: 5: + IC(0.000 ns) + CELL(0.506 ns) = 2.365 ns; Loc. = LCCOMB_X22_Y10_N28; Fanout = 10; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_3_result_int\[4\]~16'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[3]~15 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[4]~16 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 42 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.471 ns) + CELL(0.206 ns) 4.042 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|StageOut\[16\]~23 6 COMB LCCOMB_X19_Y7_N30 2 " "Info: 6: + IC(1.471 ns) + CELL(0.206 ns) = 4.042 ns; Loc. = LCCOMB_X19_Y7_N30; Fanout = 2; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|StageOut\[16\]~23'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.677 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[4]~16 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[16]~23 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 69 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.457 ns) + CELL(0.621 ns) 6.120 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[2\]~15 7 COMB LCCOMB_X22_Y10_N12 2 " "Info: 7: + IC(1.457 ns) + CELL(0.621 ns) = 6.120 ns; Loc. = LCCOMB_X22_Y10_N12; Fanout = 2; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[2\]~15'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "2.078 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[16]~23 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[2]~15 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 6.310 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[3\]~17 8 COMB LCCOMB_X22_Y10_N14 1 " "Info: 8: + IC(0.000 ns) + CELL(0.190 ns) = 6.310 ns; Loc. = LCCOMB_X22_Y10_N14; Fanout = 1; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[3\]~17'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[2]~15 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[3]~17 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 6.396 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[4\]~19 9 COMB LCCOMB_X22_Y10_N16 1 " "Info: 9: + IC(0.000 ns) + CELL(0.086 ns) = 6.396 ns; Loc. = LCCOMB_X22_Y10_N16; Fanout = 1; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[4\]~19'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[3]~17 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[4]~19 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 6.902 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[5\]~20 10 COMB LCCOMB_X22_Y10_N18 8 " "Info: 10: + IC(0.000 ns) + CELL(0.506 ns) = 6.902 ns; Loc. = LCCOMB_X22_Y10_N18; Fanout = 8; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_4_result_int\[5\]~20'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[4]~19 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[5]~20 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 47 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.713 ns) + CELL(0.651 ns) 8.266 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|StageOut\[23\]~511 11 COMB LCCOMB_X22_Y10_N20 1 " "Info: 11: + IC(0.713 ns) + CELL(0.651 ns) = 8.266 ns; Loc. = LCCOMB_X22_Y10_N20; Fanout = 1; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|StageOut\[23\]~511'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.364 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[5]~20 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[23]~511 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 69 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.033 ns) + CELL(0.621 ns) 9.920 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_5_result_int\[4\]~19 12 COMB LCCOMB_X18_Y10_N22 1 " "Info: 12: + IC(1.033 ns) + CELL(0.621 ns) = 9.920 ns; Loc. = LCCOMB_X18_Y10_N22; Fanout = 1; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_5_result_int\[4\]~19'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.654 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[23]~511 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[4]~19 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 10.426 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_5_result_int\[5\]~20 13 COMB LCCOMB_X18_Y10_N24 3 " "Info: 13: + IC(0.000 ns) + CELL(0.506 ns) = 10.426 ns; Loc. = LCCOMB_X18_Y10_N24; Fanout = 3; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|add_sub_5_result_int\[5\]~20'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[4]~19 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[5]~20 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 52 22 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.389 ns) + CELL(0.366 ns) 11.181 ns counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|StageOut\[27\]~509 14 COMB LCCOMB_X18_Y10_N26 1 " "Info: 14: + IC(0.389 ns) + CELL(0.366 ns) = 11.181 ns; Loc. = LCCOMB_X18_Y10_N26; Fanout = 1; COMB Node = 'counter:inst2\|lpm_divide:Mod0\|lpm_divide_25m:auto_generated\|sign_div_unsign_9kh:divider\|alt_u_div_kve:divider\|StageOut\[27\]~509'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "0.755 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[5]~20 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[27]~509 } "NODE_NAME" } } { "db/alt_u_div_kve.tdf" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/db/alt_u_div_kve.tdf" 69 10 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.091 ns) + CELL(0.370 ns) 12.642 ns segmain:inst1\|Mux1~13 15 COMB LCCOMB_X18_Y7_N16 1 " "Info: 15: + IC(1.091 ns) + CELL(0.370 ns) = 12.642 ns; Loc. = LCCOMB_X18_Y7_N16; Fanout = 1; COMB Node = 'segmain:inst1\|Mux1~13'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.461 ns" { counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[27]~509 segmain:inst1|Mux1~13 } "NODE_NAME" } } { "segmain.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/segmain.v" 24 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.680 ns) + CELL(0.623 ns) 13.945 ns segmain:inst1\|Mux1~14 16 COMB LCCOMB_X19_Y7_N10 7 " "Info: 16: + IC(0.680 ns) + CELL(0.623 ns) = 13.945 ns; Loc. = LCCOMB_X19_Y7_N10; Fanout = 7; COMB Node = 'segmain:inst1\|Mux1~14'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.303 ns" { segmain:inst1|Mux1~13 segmain:inst1|Mux1~14 } "NODE_NAME" } } { "segmain.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/segmain.v" 24 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.437 ns) + CELL(0.650 ns) 15.032 ns segmain:inst1\|WideOr6~15 17 COMB LCCOMB_X19_Y7_N24 1 " "Info: 17: + IC(0.437 ns) + CELL(0.650 ns) = 15.032 ns; Loc. = LCCOMB_X19_Y7_N24; Fanout = 1; COMB Node = 'segmain:inst1\|WideOr6~15'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "1.087 ns" { segmain:inst1|Mux1~14 segmain:inst1|WideOr6~15 } "NODE_NAME" } } { "segmain.v" "" { Text "E:/project/qii/yg2c58eb/ep2c5_project/sclock/segmain.v" 50 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.875 ns) + CELL(3.106 ns) 21.013 ns seg_data\[0\] 18 PIN PIN_15 0 " "Info: 18: + IC(2.875 ns) + CELL(3.106 ns) = 21.013 ns; Loc. = PIN_15; Fanout = 0; PIN Node = 'seg_data\[0\]'" { } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "5.981 ns" { segmain:inst1|WideOr6~15 seg_data[0] } "NODE_NAME" } } { "sclock.bdf" "" { Schematic "E:/project/qii/yg2c58eb/ep2c5_project/sclock/sclock.bdf" { { 224 720 896 240 "seg_data\[7..0\]" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.776 ns ( 46.52 % ) " "Info: Total cell delay = 9.776 ns ( 46.52 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.237 ns ( 53.48 % ) " "Info: Total interconnect delay = 11.237 ns ( 53.48 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "21.013 ns" { counter:inst2|scount[3] counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[1]~11 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[2]~13 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[3]~15 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[4]~16 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[16]~23 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[2]~15 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[3]~17 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[4]~19 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[5]~20 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[23]~511 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[4]~19 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[5]~20 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[27]~509 segmain:inst1|Mux1~13 segmain:inst1|Mux1~14 segmain:inst1|WideOr6~15 seg_data[0] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "21.013 ns" { counter:inst2|scount[3] {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[1]~11 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[2]~13 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[3]~15 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[4]~16 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[16]~23 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[2]~15 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[3]~17 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[4]~19 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[5]~20 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[23]~511 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[4]~19 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[5]~20 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[27]~509 {} segmain:inst1|Mux1~13 {} segmain:inst1|Mux1~14 {} segmain:inst1|WideOr6~15 {} seg_data[0] {} } { 0.000ns 1.091ns 0.000ns 0.000ns 0.000ns 1.471ns 1.457ns 0.000ns 0.000ns 0.000ns 0.713ns 1.033ns 0.000ns 0.389ns 1.091ns 0.680ns 0.437ns 2.875ns } { 0.000ns 0.596ns 0.086ns 0.086ns 0.506ns 0.206ns 0.621ns 0.190ns 0.086ns 0.506ns 0.651ns 0.621ns 0.506ns 0.366ns 0.370ns 0.623ns 0.650ns 3.106ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} } { { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "5.745 ns" { clk div:inst|clk_out div:inst|clk_out~clkctrl counter:inst2|scount[3] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "5.745 ns" { clk {} clk~combout {} div:inst|clk_out {} div:inst|clk_out~clkctrl {} counter:inst2|scount[3] {} } { 0.000ns 0.000ns 0.933ns 1.188ns 0.848ns } { 0.000ns 1.140ns 0.970ns 0.000ns 0.666ns } "" } } { "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/programfile/altera/q72/quartus/bin/TimingClosureFloorplan.fld" "" "21.013 ns" { counter:inst2|scount[3] counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[1]~11 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[2]~13 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[3]~15 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[4]~16 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[16]~23 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[2]~15 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[3]~17 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[4]~19 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[5]~20 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[23]~511 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[4]~19 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[5]~20 counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[27]~509 segmain:inst1|Mux1~13 segmain:inst1|Mux1~14 segmain:inst1|WideOr6~15 seg_data[0] } "NODE_NAME" } } { "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/programfile/altera/q72/quartus/bin/Technology_Viewer.qrui" "21.013 ns" { counter:inst2|scount[3] {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[1]~11 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[2]~13 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[3]~15 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_3_result_int[4]~16 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[16]~23 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[2]~15 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[3]~17 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[4]~19 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_4_result_int[5]~20 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[23]~511 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[4]~19 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|add_sub_5_result_int[5]~20 {} counter:inst2|lpm_divide:Mod0|lpm_divide_25m:auto_generated|sign_div_unsign_9kh:divider|alt_u_div_kve:divider|StageOut[27]~509 {} segmain:inst1|Mux1~13 {} segmain:inst1|Mux1~14 {} segmain:inst1|WideOr6~15 {} seg_data[0] {} } { 0.000ns 1.091ns 0.000ns 0.000ns 0.000ns 1.471ns 1.457ns 0.000ns 0.000ns 0.000ns 0.713ns 1.033ns 0.000ns 0.389ns 1.091ns 0.680ns 0.437ns 2.875ns } { 0.000ns 0.596ns 0.086ns 0.086ns 0.506ns 0.206ns 0.621ns 0.190ns 0.086ns 0.506ns 0.651ns 0.621ns 0.506ns 0.366ns 0.370ns 0.623ns 0.650ns 3.106ns } "" } } } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0 "" 0}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -