sclock.fit.summary

来自「FPGA EP2C5Q288C8 TEST 原码,测试OK 打开即用.」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Wed Dec 03 23:20:26 2008
Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Full Version
Revision Name : sclock
Top-level Entity Name : sclock
Family : Cyclone II
Device : EP2C8Q208C8
Timing Models : Final
Total logic elements : 423 / 8,256 ( 5 % )
    Total combinational functions : 423 / 8,256 ( 5 % )
    Dedicated logic registers : 156 / 8,256 ( 2 % )
Total registers : 156
Total pins : 32 / 138 ( 23 % )
Total virtual pins : 0
Total memory bits : 0 / 165,888 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 36 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )