sclock.map.smsg

来自「FPGA EP2C5Q288C8 TEST 原码,测试OK 打开即用.」· SMSG 代码 · 共 3 行

Warning (10268): Verilog HDL information at segmain.v(14): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at lcd.v(99): Always Construct contains both blocking and non-blocking assignments