prev_cmp_i2c_fpga.map.qmsg

FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg_data\[2\] i2c.v(731) " "Info (10041): Inferred latch for \"seg_data\[2\]\" at i2c.v(731)" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 731 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg_data\[3\] i2c.v(731) " "Info (10041): Inferred latch for \"seg_data\[3\]\" at i2c.v(731)" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 731 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg_data\[4\] i2c.v(731) " "Info (10041): Inferred latch for \"seg_data\[4\]\" at i2c.v(731)" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 731 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg_data\[5\] i2c.v(731) " "Info (10041): Inferred latch for \"seg_data\[5\]\" at i2c.v(731)" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 731 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg_data\[6\] i2c.v(731) " "Info (10041): Inferred latch for \"seg_data\[6\]\" at i2c.v(731)" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 731 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg_data\[7\] i2c.v(731) " "Info (10041): Inferred latch for \"seg_data\[7\]\" at i2c.v(731)" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 731 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_test i2c_test:inst1 " "Info: Elaborating entity \"i2c_test\" for hierarchy \"i2c_test:inst1\"" {  } { { "I2C_FPGA.bdf" "inst1" { Schematic "E:/project/qii/yg2c58eb/I2C_test/I2C_FPGA.bdf" { { -8 392 552 88 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "delay_reset_block.bdf 1 1 " "Warning: Using design file delay_reset_block.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 delay_reset_block " "Info: Found entity 1: delay_reset_block" {  } { { "delay_reset_block.bdf" "" { Schematic "E:/project/qii/yg2c58eb/I2C_test/delay_reset_block.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "delay_reset_block delay_reset_block:inst2 " "Info: Elaborating entity \"delay_reset_block\" for hierarchy \"delay_reset_block:inst2\"" {  } { { "I2C_FPGA.bdf" "inst2" { Schematic "E:/project/qii/yg2c58eb/I2C_test/I2C_FPGA.bdf" { { 8 152 344 104 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "delay_reset_block " "Warning: Processing legacy GDF or BDF entity \"delay_reset_block\" with Max+Plus II bus and instance naming rules" {  } { { "delay_reset_block.bdf" "" { Schematic "E:/project/qii/yg2c58eb/I2C_test/delay_reset_block.bdf" { } } }  } 0 0 "Processing legacy GDF or BDF entity \"%1!s!\" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "reset_counter.v 1 1 " "Warning: Using design file reset_counter.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 reset_counter " "Info: Found entity 1: reset_counter" {  } { { "reset_counter.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/reset_counter.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "reset_counter delay_reset_block:inst2\|reset_counter:inst " "Info: Elaborating entity \"reset_counter\" for hierarchy \"delay_reset_block:inst2\|reset_counter:inst\"" {  } { { "delay_reset_block.bdf" "inst" { Schematic "E:/project/qii/yg2c58eb/I2C_test/delay_reset_block.bdf" { { 224 688 832 336 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../../programfile/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../../../programfile/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "e:/programfile/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" 248 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\"" {  } { { "reset_counter.v" "lpm_counter_component" { Text "E:/project/qii/yg2c58eb/I2C_test/reset_counter.v" 73 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component " "Info: Elaborated megafunction instantiation \"delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\"" {  } { { "reset_counter.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/reset_counter.v" 73 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_p7j.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_p7j.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_p7j " "Info: Found entity 1: cntr_p7j" {  } { { "db/cntr_p7j.tdf" "" { Text "E:/project/qii/yg2c58eb/I2C_test/db/cntr_p7j.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_p7j delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated " "Info: Elaborating entity \"cntr_p7j\" for hierarchy \"delay_reset_block:inst2\|reset_counter:inst\|lpm_counter:lpm_counter_component\|cntr_p7j:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "e:/programfile/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" 272 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[7\] data_in GND " "Warning (14130): Reduced register \"i2c:inst4\|addr\[7\]\" with stuck data_in port to stuck value GND" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[6\] data_in GND " "Warning (14130): Reduced register \"i2c:inst4\|addr\[6\]\" with stuck data_in port to stuck value GND" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[5\] data_in GND " "Warning (14130): Reduced register \"i2c:inst4\|addr\[5\]\" with stuck data_in port to stuck value GND" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[4\] data_in GND " "Warning (14130): Reduced register \"i2c:inst4\|addr\[4\]\" with stuck data_in port to stuck value GND" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "i2c:inst4\|addr\[3\] High " "Info: Power-up level of register \"i2c:inst4\|addr\[3\]\" is not specified -- using power-up level of High to minimize register" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[3\] data_in VCC " "Warning (14130): Reduced register \"i2c:inst4\|addr\[3\]\" with stuck data_in port to stuck value VCC" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[2\] data_in GND " "Warning (14130): Reduced register \"i2c:inst4\|addr\[2\]\" with stuck data_in port to stuck value GND" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "i2c:inst4\|addr\[1\] High " "Info: Power-up level of register \"i2c:inst4\|addr\[1\]\" is not specified -- using power-up level of High to minimize register" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "i2c:inst4\|addr\[1\] data_in VCC " "Warning (14130): Reduced register \"i2c:inst4\|addr\[1\]\" with stuck data_in port to stuck value VCC" {  } { { "i2c.v" "" { Text "E:/project/qii/yg2c58eb/I2C_test/i2c.v" 121 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}