i2c_fpga.map.eqn

FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.

--D1L100 is i2c:inst4|Select~12619
--operation mode is normal

D1L100 = D1L99 # D1_inner_state.fifth & D1L93;


--D1L101 is i2c:inst4|Select~12620
--operation mode is normal

D1L101 = D1_inner_state.second & (D1_phase3 # D1_inner_state.third);


--D1L102 is i2c:inst4|Select~12621
--operation mode is normal

D1L102 = D1L101 # D1_inner_state.third & D1L59 & !D1L86;


--D1L103 is i2c:inst4|Select~12622
--operation mode is normal

D1L103 = D1_i2c_state.write_data & D1_inner_state.third # !D1_i2c_state.write_data & (D1L102 # D1_inner_state.third & D1L88);


--D1L104 is i2c:inst4|Select~12623
--operation mode is normal

D1L104 = D1_inner_state.third & (D1_inner_state.stop # !D1_inner_state.start # !D1_phase3);


--D1L105 is i2c:inst4|Select~12624
--operation mode is normal

D1L105 = D1L90 & (D1L101 # D1L104) # !D1L90 & D1L101 & (!D1_i2c_state.ini);


--D1L106 is i2c:inst4|Select~12625
--operation mode is normal

D1L106 = D1L105 # D1_inner_state.third & D1L93;


--D1L107 is i2c:inst4|Select~12626
--operation mode is normal

D1L107 = D1L17 # D1_phase3 & D1_inner_state.ack # !D1_phase3 & (D1_inner_state.first);


--D1L108 is i2c:inst4|Select~12627
--operation mode is normal

D1L108 = D1_inner_state.first & (D1L141 # D1L255 & D1L107) # !D1_inner_state.first & D1L255 & D1L107;


--D1L109 is i2c:inst4|Select~12628
--operation mode is normal

D1L109 = D1L107 & (!D1_i2c_state.ini);


--D1L110 is i2c:inst4|Select~12629
--operation mode is normal

D1L110 = D1L299 # !D1L86 & (D1_i2c_state.write_data # D1_i2c_state.sendaddr);


--D1L111 is i2c:inst4|Select~12630
--operation mode is normal

D1L111 = D1L49 # D1L109 # D1_inner_state.first & D1L110;


--D1L112 is i2c:inst4|Select~12631
--operation mode is normal

D1L112 = D1_inner_state.fifth & (D1_phase3 # D1_inner_state.sixth);


--D1L113 is i2c:inst4|Select~12632
--operation mode is normal

D1L113 = D1L112 # D1_inner_state.sixth & D1L59 & !D1L86;


--D1L114 is i2c:inst4|Select~12633
--operation mode is normal

D1L114 = D1_i2c_state.write_data & D1_inner_state.sixth # !D1_i2c_state.write_data & (D1L113 # D1_inner_state.sixth & D1L88);


--D1L115 is i2c:inst4|Select~12634
--operation mode is normal

D1L115 = D1_inner_state.sixth & (D1_inner_state.stop # !D1_inner_state.start # !D1_phase3);


--D1L116 is i2c:inst4|Select~12635
--operation mode is normal

D1L116 = D1L90 & (D1L112 # D1L115) # !D1L90 & D1L112 & (!D1_i2c_state.ini);


--D1L117 is i2c:inst4|Select~12636
--operation mode is normal

D1L117 = D1L116 # D1_inner_state.sixth & D1L93;


--D1L118 is i2c:inst4|Select~12637
--operation mode is normal

D1L118 = D1_inner_state.third & (D1_phase3 # D1_inner_state.fourth);


--D1L119 is i2c:inst4|Select~12638
--operation mode is normal

D1L119 = D1L118 # D1_inner_state.fourth & D1L59 & !D1L86;


--D1L120 is i2c:inst4|Select~12639
--operation mode is normal

D1L120 = D1_i2c_state.write_data & D1_inner_state.fourth # !D1_i2c_state.write_data & (D1L119 # D1_inner_state.fourth & D1L88);


--D1L121 is i2c:inst4|Select~12640
--operation mode is normal

D1L121 = D1_inner_state.fourth & (D1_inner_state.stop # !D1_inner_state.start # !D1_phase3);


--D1L122 is i2c:inst4|Select~12641
--operation mode is normal

D1L122 = D1L90 & (D1L118 # D1L121) # !D1L90 & D1L118 & (!D1_i2c_state.ini);


--D1L123 is i2c:inst4|Select~12642
--operation mode is normal

D1L123 = D1L122 # D1_inner_state.fourth & D1L93;


--D1L124 is i2c:inst4|Select~12643
--operation mode is normal

D1L124 = D1_inner_state.first & (D1_phase3 # D1_inner_state.second);


--D1L125 is i2c:inst4|Select~12644
--operation mode is normal

D1L125 = D1L124 # D1_inner_state.second & D1L59 & !D1L86;


--D1L126 is i2c:inst4|Select~12645
--operation mode is normal

D1L126 = D1_i2c_state.write_data & D1_inner_state.second # !D1_i2c_state.write_data & (D1L125 # D1_inner_state.second & D1L88);


--D1L127 is i2c:inst4|Select~12646
--operation mode is normal

D1L127 = D1_inner_state.second & (D1_inner_state.stop # !D1_inner_state.start # !D1_phase3);


--D1L128 is i2c:inst4|Select~12647
--operation mode is normal

D1L128 = D1L90 & (D1L124 # D1L127) # !D1L90 & D1L124 & (!D1_i2c_state.ini);


--D1L129 is i2c:inst4|Select~12648
--operation mode is normal

D1L129 = D1L128 # D1_inner_state.second & D1L93;


--D1L130 is i2c:inst4|Select~12649
--operation mode is normal

D1L130 = D1_inner_state.seventh & (D1_phase3 # D1_inner_state.eighth);


--D1L131 is i2c:inst4|Select~12650
--operation mode is normal

D1L131 = D1L130 # D1_inner_state.eighth & D1L59 & !D1L86;


--D1L132 is i2c:inst4|Select~12651
--operation mode is normal

D1L132 = D1_i2c_state.write_data & D1_inner_state.eighth # !D1_i2c_state.write_data & (D1L131 # D1_inner_state.eighth & D1L88);


--D1L133 is i2c:inst4|Select~12652
--operation mode is normal

D1L133 = D1_inner_state.eighth & (D1_inner_state.stop # !D1_inner_state.start # !D1_phase3);


--D1L134 is i2c:inst4|Select~12653
--operation mode is normal

D1L134 = D1L90 & (D1L130 # D1L133) # !D1L90 & D1L130 & (!D1_i2c_state.ini);


--D1L135 is i2c:inst4|Select~12654
--operation mode is normal

D1L135 = D1L134 # D1_inner_state.eighth & D1L93;


--G1_safe_q[8] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[8]
--operation mode is arithmetic

G1_safe_q[8]_carry_eqn = G1L16;
G1_safe_q[8]_lut_out = G1_safe_q[8] $ (!G1_cout & !G1_safe_q[8]_carry_eqn);
G1_safe_q[8] = DFFEAS(G1_safe_q[8]_lut_out, clk, write, , , , , , );

--G1L18 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

G1L18 = CARRY(G1_safe_q[8] & (!G1L16));


--G2_safe_q[8] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[8]
--operation mode is arithmetic

G2_safe_q[8]_carry_eqn = G2L16;
G2_safe_q[8]_lut_out = G2_safe_q[8] $ (!G2_cout & !G2_safe_q[8]_carry_eqn);
G2_safe_q[8] = DFFEAS(G2_safe_q[8]_lut_out, clk, rd, , , , , , );

--G2L18 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

G2L18 = CARRY(G2_safe_q[8] & (!G2L16));


--D1L148 is i2c:inst4|always2~199
--operation mode is normal

D1L148 = !D1_cnt_delay[8] & !D1_cnt_delay[10] & !D1_cnt_delay[12] & !D1_cnt_delay[13];


--D1L149 is i2c:inst4|always2~200
--operation mode is normal

D1L149 = !D1_cnt_delay[18] & !D1_cnt_delay[19];


--D1L142 is i2c:inst4|always2~1
--operation mode is normal

D1L142 = D1L271 & D1L147 & D1L148 & D1L149;


--G1_safe_q[7] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[7]
--operation mode is arithmetic

G1_safe_q[7]_carry_eqn = G1L14;
G1_safe_q[7]_lut_out = G1_safe_q[7] $ (!G1_cout & G1_safe_q[7]_carry_eqn);
G1_safe_q[7] = DFFEAS(G1_safe_q[7]_lut_out, clk, write, , , , , , );

--G1L16 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella7~COUT
--operation mode is arithmetic

G1L16 = CARRY(!G1L14 # !G1_safe_q[7]);


--G2_safe_q[7] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[7]
--operation mode is arithmetic

G2_safe_q[7]_carry_eqn = G2L14;
G2_safe_q[7]_lut_out = G2_safe_q[7] $ (!G2_cout & G2_safe_q[7]_carry_eqn);
G2_safe_q[7] = DFFEAS(G2_safe_q[7]_lut_out, clk, rd, , , , , , );

--G2L16 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella7~COUT
--operation mode is arithmetic

G2L16 = CARRY(!G2L14 # !G2_safe_q[7]);


--G1_safe_q[6] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[6]
--operation mode is arithmetic

G1_safe_q[6]_carry_eqn = G1L12;
G1_safe_q[6]_lut_out = G1_safe_q[6] $ (!G1_cout & !G1_safe_q[6]_carry_eqn);
G1_safe_q[6] = DFFEAS(G1_safe_q[6]_lut_out, clk, write, , , , , , );

--G1L14 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella6~COUT
--operation mode is arithmetic

G1L14 = CARRY(G1_safe_q[6] & (!G1L12));


--G2_safe_q[6] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[6]
--operation mode is arithmetic

G2_safe_q[6]_carry_eqn = G2L12;
G2_safe_q[6]_lut_out = G2_safe_q[6] $ (!G2_cout & !G2_safe_q[6]_carry_eqn);
G2_safe_q[6] = DFFEAS(G2_safe_q[6]_lut_out, clk, rd, , , , , , );

--G2L14 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella6~COUT
--operation mode is arithmetic

G2L14 = CARRY(G2_safe_q[6] & (!G2L12));


--G1_safe_q[5] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[5]
--operation mode is arithmetic

G1_safe_q[5]_carry_eqn = G1L10;
G1_safe_q[5]_lut_out = G1_safe_q[5] $ (!G1_cout & G1_safe_q[5]_carry_eqn);
G1_safe_q[5] = DFFEAS(G1_safe_q[5]_lut_out, clk, write, , , , , , );

--G1L12 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

G1L12 = CARRY(!G1L10 # !G1_safe_q[5]);


--G2_safe_q[5] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[5]
--operation mode is arithmetic

G2_safe_q[5]_carry_eqn = G2L10;
G2_safe_q[5]_lut_out = G2_safe_q[5] $ (!G2_cout & G2_safe_q[5]_carry_eqn);
G2_safe_q[5] = DFFEAS(G2_safe_q[5]_lut_out, clk, rd, , , , , , );

--G2L12 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

G2L12 = CARRY(!G2L10 # !G2_safe_q[5]);


--G1_safe_q[4] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[4]
--operation mode is arithmetic

G1_safe_q[4]_carry_eqn = G1L8;
G1_safe_q[4]_lut_out = G1_safe_q[4] $ (!G1_cout & !G1_safe_q[4]_carry_eqn);
G1_safe_q[4] = DFFEAS(G1_safe_q[4]_lut_out, clk, write, , , , , , );

--G1L10 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

G1L10 = CARRY(G1_safe_q[4] & (!G1L8));


--G2_safe_q[4] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[4]
--operation mode is arithmetic

G2_safe_q[4]_carry_eqn = G2L8;
G2_safe_q[4]_lut_out = G2_safe_q[4] $ (!G2_cout & !G2_safe_q[4]_carry_eqn);
G2_safe_q[4] = DFFEAS(G2_safe_q[4]_lut_out, clk, rd, , , , , , );

--G2L10 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

G2L10 = CARRY(G2_safe_q[4] & (!G2L8));


--G1_safe_q[3] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[3]
--operation mode is arithmetic

G1_safe_q[3]_carry_eqn = G1L6;
G1_safe_q[3]_lut_out = G1_safe_q[3] $ (!G1_cout & G1_safe_q[3]_carry_eqn);
G1_safe_q[3] = DFFEAS(G1_safe_q[3]_lut_out, clk, write, , , , , , );

--G1L8 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

G1L8 = CARRY(!G1L6 # !G1_safe_q[3]);


--G2_safe_q[3] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[3]
--operation mode is arithmetic

G2_safe_q[3]_carry_eqn = G2L6;
G2_safe_q[3]_lut_out = G2_safe_q[3] $ (!G2_cout & G2_safe_q[3]_carry_eqn);
G2_safe_q[3] = DFFEAS(G2_safe_q[3]_lut_out, clk, rd, , , , , , );

--G2L8 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

G2L8 = CARRY(!G2L6 # !G2_safe_q[3]);


--G1_safe_q[2] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[2]
--operation mode is arithmetic

G1_safe_q[2]_carry_eqn = G1L4;
G1_safe_q[2]_lut_out = G1_safe_q[2] $ (!G1_cout & !G1_safe_q[2]_carry_eqn);
G1_safe_q[2] = DFFEAS(G1_safe_q[2]_lut_out, clk, write, , , , , , );

--G1L6 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

G1L6 = CARRY(G1_safe_q[2] & (!G1L4));


--G2_safe_q[2] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[2]
--operation mode is arithmetic

G2_safe_q[2]_carry_eqn = G2L4;
G2_safe_q[2]_lut_out = G2_safe_q[2] $ (!G2_cout & !G2_safe_q[2]_carry_eqn);
G2_safe_q[2] = DFFEAS(G2_safe_q[2]_lut_out, clk, rd, , , , , , );

--G2L6 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

G2L6 = CARRY(G2_safe_q[2] & (!G2L4));


--G1_safe_q[1] is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[1]
--operation mode is arithmetic

G1_safe_q[1]_carry_eqn = G1L2;
G1_safe_q[1]_lut_out = G1_safe_q[1] $ (!G1_cout & G1_safe_q[1]_carry_eqn);
G1_safe_q[1] = DFFEAS(G1_safe_q[1]_lut_out, clk, write, , , , , , );

--G1L4 is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

G1L4 = CARRY(!G1L2 # !G1_safe_q[1]);


--G2_safe_q[1] is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|safe_q[1]
--operation mode is arithmetic

G2_safe_q[1]_carry_eqn = G2L2;
G2_safe_q[1]_lut_out = G2_safe_q[1] $ (!G2_cout & G2_safe_q[1]_carry_eqn);
G2_safe_q[1] = DFFEAS(G2_safe_q[1]_lut_out, clk, rd, , , , , , );

--G2L4 is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

G2L4 = CARRY(!G2L2 # !G2_safe_q[1]);


--G1_