i2c_fpga.map.eqn

FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.

D1L264 = D1_main_state.00 & (D1L263 & D1_sda_buf # !D1L263 & (D1_phase3));


--D1_main_state.01 is i2c:inst4|main_state.01
--operation mode is normal

D1_main_state.01_lut_out = D1L282 & (D1L276 & (C1_inst4) # !D1L276 & D1L280);
D1_main_state.01 = DFFEAS(D1_main_state.01_lut_out, clk, VCC, , , , , , );


--D1_i2c_state.read_ini is i2c:inst4|i2c_state.read_ini
--operation mode is normal

D1_i2c_state.read_ini_lut_out = D1_main_state.10 & (D1L56 # D1_i2c_state.read_ini & D1_main_state.01) # !D1_main_state.10 & D1_i2c_state.read_ini & (D1_main_state.01);
D1_i2c_state.read_ini = DFFEAS(D1_i2c_state.read_ini_lut_out, clk, VCC, , , , , !reset, );


--D1L299 is i2c:inst4|reduce_nor~88
--operation mode is normal

D1L299 = D1_i2c_state.read_ini # D1_i2c_state.read_data;


--D1_inner_state.ack is i2c:inst4|inner_state.ack
--operation mode is normal

D1_inner_state.ack_lut_out = D1_main_state.10 & (D1L60 # D1_main_state.01 & D1L67) # !D1_main_state.10 & (D1_main_state.01 & D1L67);
D1_inner_state.ack = DFFEAS(D1_inner_state.ack_lut_out, clk, VCC, , , , , !reset, );


--D1L265 is i2c:inst4|main_state~2364
--operation mode is normal

D1L265 = D1_main_state.01 & (D1L299 # D1_i2c_state.write_data & !D1_inner_state.ack);


--D1L266 is i2c:inst4|main_state~2365
--operation mode is normal

D1L266 = D1_inner_state.ack & D1_main_state.01 & !D1_i2c_state.read_ini & !D1_i2c_state.read_data;


--D1_i2c_state.sendaddr is i2c:inst4|i2c_state.sendaddr
--operation mode is normal

D1_i2c_state.sendaddr_lut_out = D1_main_state.10 & (D1L69 # D1_main_state.01 & D1L70) # !D1_main_state.10 & (D1_main_state.01 & D1L70);
D1_i2c_state.sendaddr = DFFEAS(D1_i2c_state.sendaddr_lut_out, clk, VCC, , , , , !reset, );


--D1_i2c_state.ini is i2c:inst4|i2c_state.ini
--operation mode is normal

D1_i2c_state.ini_lut_out = !D1L241 & reset & (D1_main_state.01 # D1_main_state.10);
D1_i2c_state.ini = DFFEAS(D1_i2c_state.ini_lut_out, clk, VCC, , , , , , );


--D1L267 is i2c:inst4|main_state~2366
--operation mode is normal

D1L267 = D1_inner_state.ack & (D1_i2c_state.read_ini # D1_i2c_state.sendaddr # !D1_i2c_state.ini);


--D1L268 is i2c:inst4|main_state~2367
--operation mode is normal

D1L268 = D1L266 # D1_main_state.10 & (D1_i2c_state.read_data # D1L267);


--D1_phase1 is i2c:inst4|phase1
--operation mode is normal

D1_phase1_lut_out = D1_phase1 # D1L14;
D1_phase1 = DFFEAS(D1_phase1_lut_out, clk, VCC, , , ~GND, , !reset, D1_phase1);


--D1L269 is i2c:inst4|main_state~2368
--operation mode is normal

D1L269 = D1_i2c_state.read_data & (D1_main_state.10 & D1_inner_state.stop # !D1_main_state.10 & (D1_phase1)) # !D1_i2c_state.read_data & (D1_phase1);


--D1L270 is i2c:inst4|main_state~2369
--operation mode is normal

D1L270 = D1L264 & (D1L281 # D1L268 & D1L269);


--G1_cout is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|cout
--operation mode is normal

G1_cout_carry_eqn = G1L20;
G1_cout = !G1_cout_carry_eqn;


--G2_cout is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|cout
--operation mode is normal

G2_cout_carry_eqn = G2L20;
G2_cout = !G2_cout_carry_eqn;


--D1L271 is i2c:inst4|main_state~2370
--operation mode is normal

D1L271 = !rd # !write # !G2_cout # !G1_cout;


--D1_cnt_delay[8] is i2c:inst4|cnt_delay[8]
--operation mode is arithmetic

D1_cnt_delay[8]_carry_eqn = D1L183;
D1_cnt_delay[8]_lut_out = D1_cnt_delay[8] $ (!D1_cnt_delay[8]_carry_eqn);
D1_cnt_delay[8] = DFFEAS(D1_cnt_delay[8]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L185 is i2c:inst4|cnt_delay[8]~1058
--operation mode is arithmetic

D1L185 = CARRY(D1_cnt_delay[8] & (!D1L183));


--D1_cnt_delay[10] is i2c:inst4|cnt_delay[10]
--operation mode is arithmetic

D1_cnt_delay[10]_carry_eqn = D1L187;
D1_cnt_delay[10]_lut_out = D1_cnt_delay[10] $ (!D1_cnt_delay[10]_carry_eqn);
D1_cnt_delay[10] = DFFEAS(D1_cnt_delay[10]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L189 is i2c:inst4|cnt_delay[10]~1062
--operation mode is arithmetic

D1L189 = CARRY(D1_cnt_delay[10] & (!D1L187));


--D1_cnt_delay[12] is i2c:inst4|cnt_delay[12]
--operation mode is arithmetic

D1_cnt_delay[12]_carry_eqn = D1L191;
D1_cnt_delay[12]_lut_out = D1_cnt_delay[12] $ (!D1_cnt_delay[12]_carry_eqn);
D1_cnt_delay[12] = DFFEAS(D1_cnt_delay[12]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L193 is i2c:inst4|cnt_delay[12]~1066
--operation mode is arithmetic

D1L193 = CARRY(D1_cnt_delay[12] & (!D1L191));


--D1_cnt_delay[13] is i2c:inst4|cnt_delay[13]
--operation mode is arithmetic

D1_cnt_delay[13]_carry_eqn = D1L193;
D1_cnt_delay[13]_lut_out = D1_cnt_delay[13] $ (D1_cnt_delay[13]_carry_eqn);
D1_cnt_delay[13] = DFFEAS(D1_cnt_delay[13]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L195 is i2c:inst4|cnt_delay[13]~1070
--operation mode is arithmetic

D1L195 = CARRY(!D1L193 # !D1_cnt_delay[13]);


--D1L5 is i2c:inst4|Equal~727
--operation mode is normal

D1L5 = !D1_cnt_delay[13] # !D1_cnt_delay[12] # !D1_cnt_delay[10] # !D1_cnt_delay[8];


--D1_cnt_delay[18] is i2c:inst4|cnt_delay[18]
--operation mode is arithmetic

D1_cnt_delay[18]_carry_eqn = D1L203;
D1_cnt_delay[18]_lut_out = D1_cnt_delay[18] $ (!D1_cnt_delay[18]_carry_eqn);
D1_cnt_delay[18] = DFFEAS(D1_cnt_delay[18]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L205 is i2c:inst4|cnt_delay[18]~1074
--operation mode is arithmetic

D1L205 = CARRY(D1_cnt_delay[18] & (!D1L203));


--D1_cnt_delay[19] is i2c:inst4|cnt_delay[19]
--operation mode is normal

D1_cnt_delay[19]_carry_eqn = D1L205;
D1_cnt_delay[19]_lut_out = D1_cnt_delay[19] $ (D1_cnt_delay[19]_carry_eqn);
D1_cnt_delay[19] = DFFEAS(D1_cnt_delay[19]_lut_out, clk, VCC, , D1L208, , , D1L207, );


--D1_cnt_delay[0] is i2c:inst4|cnt_delay[0]
--operation mode is arithmetic

D1_cnt_delay[0]_lut_out = !D1_cnt_delay[0];
D1_cnt_delay[0] = DFFEAS(D1_cnt_delay[0]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L169 is i2c:inst4|cnt_delay[0]~1082
--operation mode is arithmetic

D1L169 = CARRY(D1_cnt_delay[0]);


--D1_cnt_delay[1] is i2c:inst4|cnt_delay[1]
--operation mode is arithmetic

D1_cnt_delay[1]_carry_eqn = D1L169;
D1_cnt_delay[1]_lut_out = D1_cnt_delay[1] $ (D1_cnt_delay[1]_carry_eqn);
D1_cnt_delay[1] = DFFEAS(D1_cnt_delay[1]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L171 is i2c:inst4|cnt_delay[1]~1086
--operation mode is arithmetic

D1L171 = CARRY(!D1L169 # !D1_cnt_delay[1]);


--D1_cnt_delay[2] is i2c:inst4|cnt_delay[2]
--operation mode is arithmetic

D1_cnt_delay[2]_carry_eqn = D1L171;
D1_cnt_delay[2]_lut_out = D1_cnt_delay[2] $ (!D1_cnt_delay[2]_carry_eqn);
D1_cnt_delay[2] = DFFEAS(D1_cnt_delay[2]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L173 is i2c:inst4|cnt_delay[2]~1090
--operation mode is arithmetic

D1L173 = CARRY(D1_cnt_delay[2] & (!D1L171));


--D1_cnt_delay[3] is i2c:inst4|cnt_delay[3]
--operation mode is arithmetic

D1_cnt_delay[3]_carry_eqn = D1L173;
D1_cnt_delay[3]_lut_out = D1_cnt_delay[3] $ (D1_cnt_delay[3]_carry_eqn);
D1_cnt_delay[3] = DFFEAS(D1_cnt_delay[3]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L175 is i2c:inst4|cnt_delay[3]~1094
--operation mode is arithmetic

D1L175 = CARRY(!D1L173 # !D1_cnt_delay[3]);


--D1L143 is i2c:inst4|always2~194
--operation mode is normal

D1L143 = !D1_cnt_delay[0] & !D1_cnt_delay[1] & !D1_cnt_delay[2] & !D1_cnt_delay[3];


--D1_cnt_delay[4] is i2c:inst4|cnt_delay[4]
--operation mode is arithmetic

D1_cnt_delay[4]_carry_eqn = D1L175;
D1_cnt_delay[4]_lut_out = D1_cnt_delay[4] $ (!D1_cnt_delay[4]_carry_eqn);
D1_cnt_delay[4] = DFFEAS(D1_cnt_delay[4]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L177 is i2c:inst4|cnt_delay[4]~1098
--operation mode is arithmetic

D1L177 = CARRY(D1_cnt_delay[4] & (!D1L175));


--D1_cnt_delay[5] is i2c:inst4|cnt_delay[5]
--operation mode is arithmetic

D1_cnt_delay[5]_carry_eqn = D1L177;
D1_cnt_delay[5]_lut_out = D1_cnt_delay[5] $ (D1_cnt_delay[5]_carry_eqn);
D1_cnt_delay[5] = DFFEAS(D1_cnt_delay[5]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L179 is i2c:inst4|cnt_delay[5]~1102
--operation mode is arithmetic

D1L179 = CARRY(!D1L177 # !D1_cnt_delay[5]);


--D1_cnt_delay[6] is i2c:inst4|cnt_delay[6]
--operation mode is arithmetic

D1_cnt_delay[6]_carry_eqn = D1L179;
D1_cnt_delay[6]_lut_out = D1_cnt_delay[6] $ (!D1_cnt_delay[6]_carry_eqn);
D1_cnt_delay[6] = DFFEAS(D1_cnt_delay[6]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L181 is i2c:inst4|cnt_delay[6]~1106
--operation mode is arithmetic

D1L181 = CARRY(D1_cnt_delay[6] & (!D1L179));


--D1_cnt_delay[7] is i2c:inst4|cnt_delay[7]
--operation mode is arithmetic

D1_cnt_delay[7]_carry_eqn = D1L181;
D1_cnt_delay[7]_lut_out = D1_cnt_delay[7] $ (D1_cnt_delay[7]_carry_eqn);
D1_cnt_delay[7] = DFFEAS(D1_cnt_delay[7]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L183 is i2c:inst4|cnt_delay[7]~1110
--operation mode is arithmetic

D1L183 = CARRY(!D1L181 # !D1_cnt_delay[7]);


--D1L144 is i2c:inst4|always2~195
--operation mode is normal

D1L144 = !D1_cnt_delay[4] & !D1_cnt_delay[5] & !D1_cnt_delay[6] & !D1_cnt_delay[7];


--D1_cnt_delay[9] is i2c:inst4|cnt_delay[9]
--operation mode is arithmetic

D1_cnt_delay[9]_carry_eqn = D1L185;
D1_cnt_delay[9]_lut_out = D1_cnt_delay[9] $ (D1_cnt_delay[9]_carry_eqn);
D1_cnt_delay[9] = DFFEAS(D1_cnt_delay[9]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L187 is i2c:inst4|cnt_delay[9]~1114
--operation mode is arithmetic

D1L187 = CARRY(!D1L185 # !D1_cnt_delay[9]);


--D1_cnt_delay[11] is i2c:inst4|cnt_delay[11]
--operation mode is arithmetic

D1_cnt_delay[11]_carry_eqn = D1L189;
D1_cnt_delay[11]_lut_out = D1_cnt_delay[11] $ (D1_cnt_delay[11]_carry_eqn);
D1_cnt_delay[11] = DFFEAS(D1_cnt_delay[11]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L191 is i2c:inst4|cnt_delay[11]~1118
--operation mode is arithmetic

D1L191 = CARRY(!D1L189 # !D1_cnt_delay[11]);


--D1_cnt_delay[14] is i2c:inst4|cnt_delay[14]
--operation mode is arithmetic

D1_cnt_delay[14]_carry_eqn = D1L195;
D1_cnt_delay[14]_lut_out = D1_cnt_delay[14] $ (!D1_cnt_delay[14]_carry_eqn);
D1_cnt_delay[14] = DFFEAS(D1_cnt_delay[14]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L197 is i2c:inst4|cnt_delay[14]~1122
--operation mode is arithmetic

D1L197 = CARRY(D1_cnt_delay[14] & (!D1L195));


--D1_cnt_delay[15] is i2c:inst4|cnt_delay[15]
--operation mode is arithmetic

D1_cnt_delay[15]_carry_eqn = D1L197;
D1_cnt_delay[15]_lut_out = D1_cnt_delay[15] $ (D1_cnt_delay[15]_carry_eqn);
D1_cnt_delay[15] = DFFEAS(D1_cnt_delay[15]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L199 is i2c:inst4|cnt_delay[15]~1126
--operation mode is arithmetic

D1L199 = CARRY(!D1L197 # !D1_cnt_delay[15]);


--D1L145 is i2c:inst4|always2~196
--operation mode is normal

D1L145 = !D1_cnt_delay[9] & !D1_cnt_delay[11] & !D1_cnt_delay[14] & !D1_cnt_delay[15];


--D1_cnt_delay[16] is i2c:inst4|cnt_delay[16]
--operation mode is arithmetic

D1_cnt_delay[16]_carry_eqn = D1L199;
D1_cnt_delay[16]_lut_out = D1_cnt_delay[16] $ (!D1_cnt_delay[16]_carry_eqn);
D1_cnt_delay[16] = DFFEAS(D1_cnt_delay[16]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L201 is i2c:inst4|cnt_delay[16]~1130
--operation mode is arithmetic

D1L201 = CARRY(D1_cnt_delay[16] & (!D1L199));


--D1_cnt_delay[17] is i2c:inst4|cnt_delay[17]
--operation mode is arithmetic

D1_cnt_delay[17]_carry_eqn = D1L201;
D1_cnt_delay[17]_lut_out = D1_cnt_delay[17] $ (D1_cnt_delay[17]_carry_eqn);
D1_cnt_delay[17] = DFFEAS(D1_cnt_delay[17]_lut_out, clk, VCC, , D1L208, , , D1L207, );

--D1L203 is i2c:inst4|cnt_delay[17]~1134
--operation mode is arithmetic

D1L203 = CARRY(!D1L201 # !D1_cnt_delay[17]);


--D1L146 is i2c:inst4|always2~197
--operation mode is normal

D1L146 = !D1_cnt_delay[16] & !D1_cnt_delay[17];


--D1L147 is i2c:inst4|always2~198
--operation mode is normal

D1L147 = D1L143 & D1L144 & D1L145 & D1L146;


--D1L6 is i2c:inst4|Equal~728
--operation mode is normal

D1L6 = D1L5 # !D1L147 # !D1_cnt_delay[19] # !D1_cnt_delay[18];


--D1L272 is i2c:inst4|main_state~2371
--operation mode is normal

D1L272 = D1L271 & (!D1L6);


--D1_clk_div[0] is i2c:inst4|clk_div[0]
--operation mode is arithmetic

D1_clk_div[0]_lut_out = !D1_clk_div[0];
D1_clk_div[0] = DFFEAS(D1_clk_div[0]_lut_out, clk, VCC, , , , , D1L166, );

--D1L152 is i2c:inst4|clk_div[0]~167
--operation mode is arithmetic

D1L152 = CARRY(D1_clk_div[0]);


--D1_clk_div[5] is i2c:inst4|clk_div[5]
--operation mode is arithmetic

D1_clk_div[5]_carry_eqn = D1L160;
D1_clk_div[5]_lut_out = D1_clk_div[5] $ (D1_clk_div[5]_carry_eqn);
D1_clk_div[5] = DFFEAS(D1_clk_div[5]_lut_out, clk, VCC, , , , , D1L166, );

--D1L162 is i2c:inst4|clk_div[5]~171
--operation mode is arithmetic

D1L162 = CARRY(!D1L160 # !D1_clk_div[5]);


--D1_clk_div[2] is i2c:inst4|clk_div[2]
--operation mode is arithmetic

D1_clk_div[2]_carry_eqn = D1L154;
D1_clk_div[2]_lut_out = D1_clk_div[2] $ (!D1_clk_div[2]_carry_eqn);
D1_clk_div[2] = DFFEAS(D1_clk_div[2]_lut_out, clk, VCC, , , , , D1L166, );

--D1L156 is i2c:inst4|clk_div[2]~175
--operation mode is arithmetic

D1L156 = CARRY(D1_clk_div[2] & (!D1L154));