i2c_fpga.map.eqn

FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.

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--D1_scl is i2c:inst4|scl
--operation mode is normal

D1_scl_lut_out = D1L311 # D1_phase0 # !D1_main_state.00;
D1_scl = DFFEAS(D1_scl_lut_out, clk, VCC, , , VCC, , , !reset);


--D1_en[1] is i2c:inst4|en[1]
--operation mode is normal

D1_en[1]_lut_out = D1_en[1] $ D1L4;
D1_en[1] = DFFEAS(D1_en[1]_lut_out, clk, VCC, , , VCC, , , !reset);


--D1_en[0] is i2c:inst4|en[0]
--operation mode is normal

D1_en[0]_lut_out = D1_en[0] $ D1L4;
D1_en[0] = DFFEAS(D1_en[0]_lut_out, clk, VCC, , , , , !reset, );


--D1_main_state.00 is i2c:inst4|main_state.00
--operation mode is normal

D1_main_state.00_lut_out = !D1L270 & D1L282 & (D1_main_state.00 # D1L272);
D1_main_state.00 = DFFEAS(D1_main_state.00_lut_out, clk, VCC, , , , , , );


--D1_phase2 is i2c:inst4|phase2
--operation mode is normal

D1_phase2_lut_out = !D1_phase2 & D1L9;
D1_phase2 = DFFEAS(D1_phase2_lut_out, clk, VCC, , , , , !reset, );


--D1L311 is i2c:inst4|scl~12
--operation mode is normal

D1L311 = D1_scl & (!D1_phase2);


--D1_phase0 is i2c:inst4|phase0
--operation mode is normal

D1_phase0_lut_out = !D1_phase0 & D1L11;
D1_phase0 = DFFEAS(D1_phase0_lut_out, clk, VCC, , , , , !reset, );


--D1_writeData_reg[0] is i2c:inst4|writeData_reg[0]
--operation mode is normal

D1_writeData_reg[0]_lut_out = B1_counter[0] # !reset;
D1_writeData_reg[0] = DFFEAS(D1_writeData_reg[0]_lut_out, clk, VCC, , D1L330, , , , );


--D1_readData_reg[0] is i2c:inst4|readData_reg[0]
--operation mode is normal

D1_readData_reg[0]_lut_out = A1L6 & reset;
D1_readData_reg[0] = DFFEAS(D1_readData_reg[0]_lut_out, clk, VCC, , D1L296, , , , );


--D1L323 is i2c:inst4|seg_data_buf[0]~338
--operation mode is normal

D1L323 = D1_en[1] & (D1_readData_reg[0] & !D1_en[0]) # !D1_en[1] & D1_writeData_reg[0] & (D1_en[0]);


--D1_writeData_reg[1] is i2c:inst4|writeData_reg[1]
--operation mode is normal

D1_writeData_reg[1]_lut_out = reset & B1_counter[1];
D1_writeData_reg[1] = DFFEAS(D1_writeData_reg[1]_lut_out, clk, VCC, , D1L330, , , , );


--D1_readData_reg[1] is i2c:inst4|readData_reg[1]
--operation mode is normal

D1_readData_reg[1]_lut_out = reset & D1_readData_reg[0];
D1_readData_reg[1] = DFFEAS(D1_readData_reg[1]_lut_out, clk, VCC, , D1L296, , , , );


--D1L324 is i2c:inst4|seg_data_buf[1]~339
--operation mode is normal

D1L324 = D1_en[1] & (D1_readData_reg[1] & !D1_en[0]) # !D1_en[1] & D1_writeData_reg[1] & (D1_en[0]);


--D1_writeData_reg[2] is i2c:inst4|writeData_reg[2]
--operation mode is normal

D1_writeData_reg[2]_lut_out = B1_counter[2] # !reset;
D1_writeData_reg[2] = DFFEAS(D1_writeData_reg[2]_lut_out, clk, VCC, , D1L330, , , , );


--D1_readData_reg[2] is i2c:inst4|readData_reg[2]
--operation mode is normal

D1_readData_reg[2]_lut_out = reset & D1_readData_reg[1];
D1_readData_reg[2] = DFFEAS(D1_readData_reg[2]_lut_out, clk, VCC, , D1L296, , , , );


--D1L325 is i2c:inst4|seg_data_buf[2]~340
--operation mode is normal

D1L325 = D1_en[1] & (D1_readData_reg[2] & !D1_en[0]) # !D1_en[1] & D1_writeData_reg[2] & (D1_en[0]);


--D1_writeData_reg[3] is i2c:inst4|writeData_reg[3]
--operation mode is normal

D1_writeData_reg[3]_lut_out = reset & B1_counter[3];
D1_writeData_reg[3] = DFFEAS(D1_writeData_reg[3]_lut_out, clk, VCC, , D1L330, , , , );


--D1_readData_reg[3] is i2c:inst4|readData_reg[3]
--operation mode is normal

D1_readData_reg[3]_lut_out = reset & D1_readData_reg[2];
D1_readData_reg[3] = DFFEAS(D1_readData_reg[3]_lut_out, clk, VCC, , D1L296, , , , );


--D1L326 is i2c:inst4|seg_data_buf[3]~341
--operation mode is normal

D1L326 = D1_en[1] & (D1_readData_reg[3] & !D1_en[0]) # !D1_en[1] & D1_writeData_reg[3] & (D1_en[0]);


--D1L301 is i2c:inst4|reduce_or~241
--operation mode is normal

D1L301 = D1L323 & (D1L326 # D1L324 $ D1L325) # !D1L323 & (D1L324 # D1L325 $ D1L326);


--D1_readData_reg[4] is i2c:inst4|readData_reg[4]
--operation mode is normal

D1_readData_reg[4]_lut_out = reset & D1_readData_reg[3];
D1_readData_reg[4] = DFFEAS(D1_readData_reg[4]_lut_out, clk, VCC, , D1L296, , , , );


--D1_readData_reg[5] is i2c:inst4|readData_reg[5]
--operation mode is normal

D1_readData_reg[5]_lut_out = reset & D1_readData_reg[4];
D1_readData_reg[5] = DFFEAS(D1_readData_reg[5]_lut_out, clk, VCC, , D1L296, , , , );


--D1_readData_reg[6] is i2c:inst4|readData_reg[6]
--operation mode is normal

D1_readData_reg[6]_lut_out = reset & D1_readData_reg[5];
D1_readData_reg[6] = DFFEAS(D1_readData_reg[6]_lut_out, clk, VCC, , D1L296, , , , );


--D1_readData_reg[7] is i2c:inst4|readData_reg[7]
--operation mode is normal

D1_readData_reg[7]_lut_out = reset & D1_readData_reg[6];
D1_readData_reg[7] = DFFEAS(D1_readData_reg[7]_lut_out, clk, VCC, , D1L296, , , , );


--D1L302 is i2c:inst4|reduce_or~242
--operation mode is normal

D1L302 = !D1_readData_reg[4] & !D1_readData_reg[5] & !D1_readData_reg[6] & !D1_readData_reg[7];


--D1L303 is i2c:inst4|reduce_or~243
--operation mode is normal

D1L303 = D1_en[0] # D1L302 # !D1_en[1];


--D1L304 is i2c:inst4|reduce_or~244
--operation mode is normal

D1L304 = D1L323 & (D1L326 $ (D1L324 # !D1L325)) # !D1L323 & D1L324 & !D1L325 & !D1L326;


--D1L305 is i2c:inst4|reduce_or~245
--operation mode is normal

D1L305 = D1L324 & D1L323 & (!D1L326) # !D1L324 & (D1L325 & (!D1L326) # !D1L325 & D1L323);


--D1L306 is i2c:inst4|reduce_or~246
--operation mode is normal

D1L306 = D1L324 & (D1L323 & D1L325 # !D1L323 & !D1L325 & D1L326) # !D1L324 & !D1L326 & (D1L323 $ D1L325);


--D1L307 is i2c:inst4|reduce_or~247
--operation mode is normal

D1L307 = D1L325 & D1L326 & (D1L324 # !D1L323) # !D1L325 & !D1L323 & D1L324 & !D1L326;


--D1L308 is i2c:inst4|reduce_or~248
--operation mode is normal

D1L308 = D1L324 & (D1L323 & (D1L326) # !D1L323 & D1L325) # !D1L324 & D1L325 & (D1L323 $ D1L326);


--D1L309 is i2c:inst4|reduce_or~249
--operation mode is normal

D1L309 = D1L325 & !D1L324 & (D1L323 $ !D1L326) # !D1L325 & D1L323 & (D1L324 $ !D1L326);


--D1_cnt_scan[0] is i2c:inst4|cnt_scan[0]
--operation mode is arithmetic

D1_cnt_scan[0]_lut_out = !D1_cnt_scan[0];
D1_cnt_scan[0] = DFFEAS(D1_cnt_scan[0]_lut_out, clk, VCC, , , , , !reset, );

--D1L211 is i2c:inst4|cnt_scan[0]~135
--operation mode is arithmetic

D1L211 = CARRY(D1_cnt_scan[0]);


--D1_cnt_scan[1] is i2c:inst4|cnt_scan[1]
--operation mode is arithmetic

D1_cnt_scan[1]_carry_eqn = D1L211;
D1_cnt_scan[1]_lut_out = D1_cnt_scan[1] $ (D1_cnt_scan[1]_carry_eqn);
D1_cnt_scan[1] = DFFEAS(D1_cnt_scan[1]_lut_out, clk, VCC, , , , , !reset, );

--D1L213 is i2c:inst4|cnt_scan[1]~139
--operation mode is arithmetic

D1L213 = CARRY(!D1L211 # !D1_cnt_scan[1]);


--D1_cnt_scan[2] is i2c:inst4|cnt_scan[2]
--operation mode is arithmetic

D1_cnt_scan[2]_carry_eqn = D1L213;
D1_cnt_scan[2]_lut_out = D1_cnt_scan[2] $ (!D1_cnt_scan[2]_carry_eqn);
D1_cnt_scan[2] = DFFEAS(D1_cnt_scan[2]_lut_out, clk, VCC, , , , , !reset, );

--D1L215 is i2c:inst4|cnt_scan[2]~143
--operation mode is arithmetic

D1L215 = CARRY(D1_cnt_scan[2] & (!D1L213));


--D1_cnt_scan[3] is i2c:inst4|cnt_scan[3]
--operation mode is arithmetic

D1_cnt_scan[3]_carry_eqn = D1L215;
D1_cnt_scan[3]_lut_out = D1_cnt_scan[3] $ (D1_cnt_scan[3]_carry_eqn);
D1_cnt_scan[3] = DFFEAS(D1_cnt_scan[3]_lut_out, clk, VCC, , , , , !reset, );

--D1L217 is i2c:inst4|cnt_scan[3]~147
--operation mode is arithmetic

D1L217 = CARRY(!D1L215 # !D1_cnt_scan[3]);


--D1L1 is i2c:inst4|Equal~723
--operation mode is normal

D1L1 = D1_cnt_scan[0] & D1_cnt_scan[1] & D1_cnt_scan[2] & D1_cnt_scan[3];


--D1_cnt_scan[4] is i2c:inst4|cnt_scan[4]
--operation mode is arithmetic

D1_cnt_scan[4]_carry_eqn = D1L217;
D1_cnt_scan[4]_lut_out = D1_cnt_scan[4] $ (!D1_cnt_scan[4]_carry_eqn);
D1_cnt_scan[4] = DFFEAS(D1_cnt_scan[4]_lut_out, clk, VCC, , , , , !reset, );

--D1L219 is i2c:inst4|cnt_scan[4]~151
--operation mode is arithmetic

D1L219 = CARRY(D1_cnt_scan[4] & (!D1L217));


--D1_cnt_scan[5] is i2c:inst4|cnt_scan[5]
--operation mode is arithmetic

D1_cnt_scan[5]_carry_eqn = D1L219;
D1_cnt_scan[5]_lut_out = D1_cnt_scan[5] $ (D1_cnt_scan[5]_carry_eqn);
D1_cnt_scan[5] = DFFEAS(D1_cnt_scan[5]_lut_out, clk, VCC, , , , , !reset, );

--D1L221 is i2c:inst4|cnt_scan[5]~155
--operation mode is arithmetic

D1L221 = CARRY(!D1L219 # !D1_cnt_scan[5]);


--D1_cnt_scan[6] is i2c:inst4|cnt_scan[6]
--operation mode is arithmetic

D1_cnt_scan[6]_carry_eqn = D1L221;
D1_cnt_scan[6]_lut_out = D1_cnt_scan[6] $ (!D1_cnt_scan[6]_carry_eqn);
D1_cnt_scan[6] = DFFEAS(D1_cnt_scan[6]_lut_out, clk, VCC, , , , , !reset, );

--D1L223 is i2c:inst4|cnt_scan[6]~159
--operation mode is arithmetic

D1L223 = CARRY(D1_cnt_scan[6] & (!D1L221));


--D1_cnt_scan[7] is i2c:inst4|cnt_scan[7]
--operation mode is arithmetic

D1_cnt_scan[7]_carry_eqn = D1L223;
D1_cnt_scan[7]_lut_out = D1_cnt_scan[7] $ (D1_cnt_scan[7]_carry_eqn);
D1_cnt_scan[7] = DFFEAS(D1_cnt_scan[7]_lut_out, clk, VCC, , , , , !reset, );

--D1L225 is i2c:inst4|cnt_scan[7]~163
--operation mode is arithmetic

D1L225 = CARRY(!D1L223 # !D1_cnt_scan[7]);


--D1L2 is i2c:inst4|Equal~724
--operation mode is normal

D1L2 = D1_cnt_scan[4] & D1_cnt_scan[5] & D1_cnt_scan[6] & D1_cnt_scan[7];


--D1_cnt_scan[8] is i2c:inst4|cnt_scan[8]
--operation mode is arithmetic

D1_cnt_scan[8]_carry_eqn = D1L225;
D1_cnt_scan[8]_lut_out = D1_cnt_scan[8] $ (!D1_cnt_scan[8]_carry_eqn);
D1_cnt_scan[8] = DFFEAS(D1_cnt_scan[8]_lut_out, clk, VCC, , , , , !reset, );

--D1L227 is i2c:inst4|cnt_scan[8]~167
--operation mode is arithmetic

D1L227 = CARRY(D1_cnt_scan[8] & (!D1L225));


--D1_cnt_scan[9] is i2c:inst4|cnt_scan[9]
--operation mode is arithmetic

D1_cnt_scan[9]_carry_eqn = D1L227;
D1_cnt_scan[9]_lut_out = D1_cnt_scan[9] $ (D1_cnt_scan[9]_carry_eqn);
D1_cnt_scan[9] = DFFEAS(D1_cnt_scan[9]_lut_out, clk, VCC, , , , , !reset, );

--D1L229 is i2c:inst4|cnt_scan[9]~171
--operation mode is arithmetic

D1L229 = CARRY(!D1L227 # !D1_cnt_scan[9]);


--D1_cnt_scan[10] is i2c:inst4|cnt_scan[10]
--operation mode is arithmetic

D1_cnt_scan[10]_carry_eqn = D1L229;
D1_cnt_scan[10]_lut_out = D1_cnt_scan[10] $ (!D1_cnt_scan[10]_carry_eqn);
D1_cnt_scan[10] = DFFEAS(D1_cnt_scan[10]_lut_out, clk, VCC, , , , , !reset, );

--D1L231 is i2c:inst4|cnt_scan[10]~175
--operation mode is arithmetic

D1L231 = CARRY(D1_cnt_scan[10] & (!D1L229));


--D1_cnt_scan[11] is i2c:inst4|cnt_scan[11]
--operation mode is normal

D1_cnt_scan[11]_carry_eqn = D1L231;
D1_cnt_scan[11]_lut_out = D1_cnt_scan[11] $ (D1_cnt_scan[11]_carry_eqn);
D1_cnt_scan[11] = DFFEAS(D1_cnt_scan[11]_lut_out, clk, VCC, , , , , !reset, );


--D1L3 is i2c:inst4|Equal~725
--operation mode is normal

D1L3 = D1_cnt_scan[8] & D1_cnt_scan[9] & D1_cnt_scan[10] & D1_cnt_scan[11];


--D1L4 is i2c:inst4|Equal~726
--operation mode is normal

D1L4 = D1L1 & D1L2 & D1L3;


--D1_sda_buf is i2c:inst4|sda_buf
--operation mode is normal

D1_sda_buf_lut_out = D1L48;
D1_sda_buf = DFFEAS(D1_sda_buf_lut_out, clk, VCC, , , VCC, , , !reset);


--D1_phase3 is i2c:inst4|phase3
--operation mode is normal

D1_phase3_lut_out = D1_phase3 # D1L16;
D1_phase3 = DFFEAS(D1_phase3_lut_out, clk, VCC, , , ~GND, , !reset, D1_phase3);


--D1_i2c_state.write_data is i2c:inst4|i2c_state.write_data
--operation mode is normal

D1_i2c_state.write_data_lut_out = D1_main_state.01 & (D1_i2c_state.write_data # D1L49) # !D1_main_state.01 & D1_i2c_state.write_data & (D1_main_state.10);
D1_i2c_state.write_data = DFFEAS(D1_i2c_state.write_data_lut_out, clk, VCC, , , , , !reset, );


--D1_inner_state.stop is i2c:inst4|inner_state.stop
--operation mode is normal

D1_inner_state.stop_lut_out = D1L51 # D1_main_state.01 & (D1_inner_state.stop # D1L53);
D1_inner_state.stop = DFFEAS(D1_inner_state.stop_lut_out, clk, VCC, , , , , !reset, );


--D1_main_state.10 is i2c:inst4|main_state.10
--operation mode is normal

D1_main_state.10_lut_out = D1L282 & (D1L276 & !C1_inst4 # !D1L276 & (D1L275));
D1_main_state.10 = DFFEAS(D1_main_state.10_lut_out, clk, VCC, , , , , , );


--D1_i2c_state.read_data is i2c:inst4|i2c_state.read_data
--operation mode is normal

D1_i2c_state.read_data_lut_out = D1_main_state.10 & (D1_i2c_state.read_data # D1L54) # !D1_main_state.10 & D1_i2c_state.read_data & (D1_main_state.01);
D1_i2c_state.read_data = DFFEAS(D1_i2c_state.read_data_lut_out, clk, VCC, , , , , !reset, );


--D1L263 is i2c:inst4|main_state~2362
--operation mode is normal

D1L263 = D1_main_state.10 & (!D1_i2c_state.read_data) # !D1_main_state.10 & (!D1_inner_state.stop # !D1_i2c_state.write_data);


--D1L264 is i2c:inst4|main_state~2363
--operation mode is normal