prev_cmp_fivecall.qmsg

设计一个五路呼叫器,具体设计要求如下: 1．五个按键模拟五个呼叫源 2．当有一个按键按下时

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version " "Info: Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Dec 02 18:31:48 2008 " "Info: Processing started: Tue Dec 02 18:31:48 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off FIVECALL -c FIVECALL " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off FIVECALL -c FIVECALL" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DFRE.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file DFRE.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DFRE-run " "Info: Found design unit 1: DFRE-run" {  } { { "DFRE.vhd" "" { Text "D:/fivecall/DFRE.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 DFRE " "Info: Found entity 1: DFRE" {  } { { "DFRE.vhd" "" { Text "D:/fivecall/DFRE.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "COUNTER.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file COUNTER.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 COUNTER-FUN " "Info: Found design unit 1: COUNTER-FUN" {  } { { "COUNTER.vhd" "" { Text "D:/fivecall/COUNTER.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 COUNTER " "Info: Found entity 1: COUNTER" {  } { { "COUNTER.vhd" "" { Text "D:/fivecall/COUNTER.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "FTIMER.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file FTIMER.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 FTIMER-run " "Info: Found design unit 1: FTIMER-run" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 FTIMER " "Info: Found entity 1: FTIMER" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "FIVECALL.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file FIVECALL.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 FIVECALL " "Info: Found entity 1: FIVECALL" {  } { { "FIVECALL.bdf" "" { Schematic "D:/fivecall/FIVECALL.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "KEY.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file KEY.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 KEY-FUN " "Info: Found design unit 1: KEY-FUN" {  } { { "KEY.vhd" "" { Text "D:/fivecall/KEY.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 KEY " "Info: Found entity 1: KEY" {  } { { "KEY.vhd" "" { Text "D:/fivecall/KEY.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "FIVECALL " "Info: Elaborating entity \"FIVECALL\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "KEY KEY:inst3 " "Info: Elaborating entity \"KEY\" for hierarchy \"KEY:inst3\"" {  } { { "FIVECALL.bdf" "inst3" { Schematic "D:/fivecall/FIVECALL.bdf" { { 80 216 376 176 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "BKEY KEY.vhd(19) " "Warning (10492): VHDL Process Statement warning at KEY.vhd(19): signal \"BKEY\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "KEY.vhd" "" { Text "D:/fivecall/KEY.vhd" 19 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "FTIMER FTIMER:inst8 " "Info: Elaborating entity \"FTIMER\" for hierarchy \"FTIMER:inst8\"" {  } { { "FIVECALL.bdf" "inst8" { Schematic "D:/fivecall/FIVECALL.bdf" { { -16 528 688 80 "inst8" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "S_oLED FTIMER.vhd(24) " "Warning (10492): VHDL Process Statement warning at FTIMER.vhd(24): signal \"S_oLED\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 24 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "S_oLED FTIMER.vhd(14) " "Warning (10631): VHDL Process Statement warning at FTIMER.vhd(14): inferring latch(es) for signal or variable \"S_oLED\", which holds its previous value in one or more paths through the process" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 14 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "S_oLED\[0\] FTIMER.vhd(14) " "Info (10041): Inferred latch for \"S_oLED\[0\]\" at FTIMER.vhd(14)" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 14 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "S_oLED\[1\] FTIMER.vhd(14) " "Info (10041): Inferred latch for \"S_oLED\[1\]\" at FTIMER.vhd(14)" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 14 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "S_oLED\[2\] FTIMER.vhd(14) " "Info (10041): Inferred latch for \"S_oLED\[2\]\" at FTIMER.vhd(14)" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 14 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "S_oLED\[3\] FTIMER.vhd(14) " "Info (10041): Inferred latch for \"S_oLED\[3\]\" at FTIMER.vhd(14)" {  } { { "FTIMER.vhd" "" { Text "D:/fivecall/FTIMER.vhd" 14 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}