songer.tan.qmsg

利用数控分频器设计硬件电子琴.硬件电子琴电路模块设计

{ "Warning" "WTAN_CLOCK_WILL_NOT_OPERATE" "CLK6 52 " "Warning: Circuit may not operate. Detected 52 non-operational path(s) clocked by clock \"CLK6\" with clock skew larger than data delay. See Compilation Report for details." {  } {  } 0 0 "Circuit may not operate. Detected %2!d! non-operational path(s) clocked by clock \"%1!s!\" with clock skew larger than data delay. See Compilation Report for details." 0 0 "" 0}
{ "Info" "ITDB_FULL_NEGATIVE_HOLD_RESULT" "NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[3\] ToneTaba:u4\|HIGH CLK6 3.258 ns " "Info: Found hold time violation between source  pin or register \"NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[3\]\" and destination pin or register \"ToneTaba:u4\|HIGH\" for clock \"CLK6\" (Hold time is 3.258 ns)" { { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "4.649 ns + Largest " "Info: + Largest clock skew is 4.649 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK6 destination 9.315 ns + Longest register " "Info: + Longest clock path from clock \"CLK6\" to destination register is 9.315 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.979 ns) 0.979 ns CLK6 1 CLK PIN_D13 2 " "Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_D13; Fanout = 2; CLK Node = 'CLK6'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLK6 } "NODE_NAME" } } { "Songer.vhd" "" { Text "I:/test4/Songer.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.634 ns) + CELL(0.787 ns) 2.400 ns CNT6:u2\|Q6 2 REG LCFF_X30_Y32_N23 13 " "Info: 2: + IC(0.634 ns) + CELL(0.787 ns) = 2.400 ns; Loc. = LCFF_X30_Y32_N23; Fanout = 13; REG Node = 'CNT6:u2\|Q6'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.421 ns" { CLK6 CNT6:u2|Q6 } "NODE_NAME" } } { "CNT6.vhd" "" { Text "I:/test4/CNT6.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.631 ns) + CELL(0.932 ns) 4.963 ns NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[1\] 3 MEM M4K_X52_Y29 15 " "Info: 3: + IC(1.631 ns) + CELL(0.932 ns) = 4.963 ns; Loc. = M4K_X52_Y29; Fanout = 15; MEM Node = 'NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[1\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.563 ns" { CNT6:u2|Q6 NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[1] } "NODE_NAME" } } { "db/altsyncram_j071.tdf" "" { Text "I:/test4/db/altsyncram_j071.tdf" 31 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.653 ns) + CELL(0.389 ns) 6.005 ns ToneTaba:u4\|Mux4~31 4 COMB LCCOMB_X51_Y29_N16 1 " "Info: 4: + IC(0.653 ns) + CELL(0.389 ns) = 6.005 ns; Loc. = LCCOMB_X51_Y29_N16; Fanout = 1; COMB Node = 'ToneTaba:u4\|Mux4~31'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.042 ns" { NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[1] ToneTaba:u4|Mux4~31 } "NODE_NAME" } } { "ToneTaba.vhd" "" { Text "I:/test4/ToneTaba.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.842 ns) + CELL(0.000 ns) 7.847 ns ToneTaba:u4\|Mux4~31clkctrl 5 COMB CLKCTRL_G4 15 " "Info: 5: + IC(1.842 ns) + CELL(0.000 ns) = 7.847 ns; Loc. = CLKCTRL_G4; Fanout = 15; COMB Node = 'ToneTaba:u4\|Mux4~31clkctrl'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.842 ns" { ToneTaba:u4|Mux4~31 ToneTaba:u4|Mux4~31clkctrl } "NODE_NAME" } } { "ToneTaba.vhd" "" { Text "I:/test4/ToneTaba.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.318 ns) + CELL(0.150 ns) 9.315 ns ToneTaba:u4\|HIGH 6 REG LCCOMB_X51_Y29_N2 1 " "Info: 6: + IC(1.318 ns) + CELL(0.150 ns) = 9.315 ns; Loc. = LCCOMB_X51_Y29_N2; Fanout = 1; REG Node = 'ToneTaba:u4\|HIGH'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.468 ns" { ToneTaba:u4|Mux4~31clkctrl ToneTaba:u4|HIGH } "NODE_NAME" } } { "ToneTaba.vhd" "" { Text "I:/test4/ToneTaba.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.237 ns ( 34.75 % ) " "Info: Total cell delay = 3.237 ns ( 34.75 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.078 ns ( 65.25 % ) " "Info: Total interconnect delay = 6.078 ns ( 65.25 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "9.315 ns" { CLK6 CNT6:u2|Q6 NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[1] ToneTaba:u4|Mux4~31 ToneTaba:u4|Mux4~31clkctrl ToneTaba:u4|HIGH } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "9.315 ns" { CLK6 {} CLK6~combout {} CNT6:u2|Q6 {} NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[1] {} ToneTaba:u4|Mux4~31 {} ToneTaba:u4|Mux4~31clkctrl {} ToneTaba:u4|HIGH {} } { 0.000ns 0.000ns 0.634ns 1.631ns 0.653ns 1.842ns 1.318ns } { 0.000ns 0.979ns 0.787ns 0.932ns 0.389ns 0.000ns 0.150ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK6 source 4.666 ns - Shortest memory " "Info: - Shortest clock path from clock \"CLK6\" to source memory is 4.666 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.979 ns) 0.979 ns CLK6 1 CLK PIN_D13 2 " "Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_D13; Fanout = 2; CLK Node = 'CLK6'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLK6 } "NODE_NAME" } } { "Songer.vhd" "" { Text "I:/test4/Songer.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.634 ns) + CELL(0.787 ns) 2.400 ns CNT6:u2\|Q6 2 REG LCFF_X30_Y32_N23 13 " "Info: 2: + IC(0.634 ns) + CELL(0.787 ns) = 2.400 ns; Loc. = LCFF_X30_Y32_N23; Fanout = 13; REG Node = 'CNT6:u2\|Q6'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.421 ns" { CLK6 CNT6:u2|Q6 } "NODE_NAME" } } { "CNT6.vhd" "" { Text "I:/test4/CNT6.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.631 ns) + CELL(0.635 ns) 4.666 ns NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[3\] 3 MEM M4K_X52_Y29 16 " "Info: 3: + IC(1.631 ns) + CELL(0.635 ns) = 4.666 ns; Loc. = M4K_X52_Y29; Fanout = 16; MEM Node = 'NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[3\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.266 ns" { CNT6:u2|Q6 NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[3] } "NODE_NAME" } } { "db/altsyncram_j071.tdf" "" { Text "I:/test4/db/altsyncram_j071.tdf" 31 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.401 ns ( 51.46 % ) " "Info: Total cell delay = 2.401 ns ( 51.46 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.265 ns ( 48.54 % ) " "Info: Total interconnect delay = 2.265 ns ( 48.54 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.666 ns" { CLK6 CNT6:u2|Q6 NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[3] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "4.666 ns" { CLK6 {} CLK6~combout {} CNT6:u2|Q6 {} NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[3] {} } { 0.000ns 0.000ns 0.634ns 1.631ns } { 0.000ns 0.979ns 0.787ns 0.635ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "9.315 ns" { CLK6 CNT6:u2|Q6 NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[1] ToneTaba:u4|Mux4~31 ToneTaba:u4|Mux4~31clkctrl ToneTaba:u4|HIGH } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "9.315 ns" { CLK6 {} CLK6~combout {} CNT6:u2|Q6 {} NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[1] {} ToneTaba:u4|Mux4~31 {} ToneTaba:u4|Mux4~31clkctrl {} ToneTaba:u4|HIGH {} } { 0.000ns 0.000ns 0.634ns 1.631ns 0.653ns 1.842ns 1.318ns } { 0.000ns 0.979ns 0.787ns 0.932ns 0.389ns 0.000ns 0.150ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.666 ns" { CLK6 CNT6:u2|Q6 NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[3] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "4.666 ns" { CLK6 {} CLK6~combout {} CNT6:u2|Q6 {} NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[3] {} } { 0.000ns 0.000ns 0.634ns 1.631ns } { 0.000ns 0.979ns 0.787ns 0.635ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.209 ns - " "Info: - Micro clock to output delay of source is 0.209 ns" {  } { { "db/altsyncram_j071.tdf" "" { Text "I:/test4/db/altsyncram_j071.tdf" 31 2 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.182 ns - Shortest memory register " "Info: - Shortest memory to register delay is 1.182 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.088 ns) 0.088 ns NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[3\] 1 MEM M4K_X52_Y29 16 " "Info: 1: + IC(0.000 ns) + CELL(0.088 ns) = 0.088 ns; Loc. = M4K_X52_Y29; Fanout = 16; MEM Node = 'NoteTabs:u3\|music:u1\|altsyncram:altsyncram_component\|altsyncram_j071:auto_generated\|q_a\[3\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { NoteTabs:u3|music:u1|altsyncram:altsyncram_component|altsyncram_j071:auto_generated|q_a[3] } "NODE_NAME" } } { "db/altsyncram_j071.tdf" "" { Text "I:/test4/db/altsyncram_j071.tdf" 31 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.674 ns) + CELL(0.420 ns) 1.182 ns ToneTaba:u4\|HIGH 2 REG LCCOMB_X51_Y29_N2 1 " "Info: 2: + IC(0.674 ns) + CELL(0.420 ns) = 1.182 ns; Loc. = LCCOMB_X51_Y29_N2; Fanout = 1; REG Node = 'ToneTaba:u4\|HIGH'" {  } { { "c:/altera/7