songer.qsf

利用数控分频器设计硬件电子琴.硬件电子琴电路模块设计

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		Songer_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name TOP_LEVEL_ENTITY Songer
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:37:52  NOVEMBER 17, 2002"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_location_assignment PIN_N2 -to CLK4
set_location_assignment PIN_D13 -to CLK6
set_location_assignment PIN_C6 -to SPKOUT
set_global_assignment -name VHDL_FILE Songer.vhd
set_global_assignment -name VHDL_FILE Speakera.vhd
set_global_assignment -name VHDL_FILE ToneTaba.vhd
set_global_assignment -name VHDL_FILE NoteTabs.vhd
set_global_assignment -name VHDL_FILE CNT4.vhd
set_global_assignment -name VHDL_FILE CNT6.vhd
set_global_assignment -name MIF_FILE music.mif
set_global_assignment -name VECTOR_WAVEFORM_FILE Songer.vwf
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE Songer.vwf