baskterballconter.txt

这是一个关于篮球24秒计数的Verilog程序

module countball(clk,start,halt,reset,clear,led,seven_led,led_con,seq);
  input clk,start,halt,reset,clear,seq;
  output led;
  output [7:0] seven_led,led_con;
  reg [7:0] R_seven_led,R_led_con;
  reg R_led;
  reg [7:0] shu;
  reg [31:0] j;
  reg [31:0] i;
  reg flag1;
  reg flag;
  wire [7:0] ten;
  wire [7:0] unit;

  reg [3:0] key_rst;
  reg [3:0] key_rst_r;
  reg [3:0] low_st;
  reg [3:0] low_st_r; 
  reg [19:0] cnt;
  wire [3:0] key_an;
  wire [3:0] key_ctrl;

  assign key_an=key_rst_r&(~key_rst);
  assign key_ctrl=low_st_r&(~low_st);

  assign seven_led=R_seven_led;
  assign led_con=R_led_con;
  assign ten=display(shu/10);
  assign unit=display(shu%10);   

  parameter S0=2'b00,S1=2'b01;
  reg [2:0] state;  

  always@(posedge clk or negedge reset)
    if(!reset)
    key_rst<=4'b1111;
    else 
    key_rst<={seq,halt,clear,start};

  always@(posedge clk or negedge reset)
    if(!reset)
    key_rst<=4'b1111;
    else
    key_rst_r<=key_rst;

  always@(posedge clk or negedge reset)
    if(!reset)
    cnt<=20'b0;
    else if(key_an)
    cnt<=20'b0;
    else 
    cnt<=cnt+20'b1;

  always@(posedge clk or negedge reset)
    if(!reset)
    low_st<=4'b1111;
    else if(cnt==20'hfffff)
    low_st<={seq,halt,clear,start};

  always@(posedge clk or negedge reset)
    if(!reset)
    low_st_r<=4'b1111;
    else
    low_st_r<=low_st;

  always@(posedge clk or negedge reset)
    if(!reset)
    begin
    R_led_con<=8'b1111_1111;
    shu<=8'd24;
    flag<=0;
    end
    else
    begin 
    if(key_ctrl[1]==1)
    begin
    shu<=8'd24;
    flag1<=1;
    end
    end 

  /*always@(key_ctrl[1])
    if(key_ctrl[1]==0)
    begin
    flag1=1; 
    shu<=8'd24;
    end
    else
    flag1=0;    */

  always@(posedge clk or negedge reset)
    if(!reset)
    begin
    j<=32'b0;
    flag1<=0;
    R_led_con<=8'b1111_1111;
    shu<=8'd24;
    end
    else if(flag1==1)
    begin
    if(j==60000000)
    begin
    j<=32'b0;
    shu<=shu-8'b1;
    end
    else 
    j<=j+32'b1;
    end
    //else
    //R_led_con<=8'b1111_1111;

  always@(key_ctrl[0])
    if(key_ctrl[0]==1)
    flag=1;
    else
    flag=0;

  always@(posedge clk or negedge reset)
    if(!reset)
    begin
    i<=32'b0;
    flag=0;
    end
    else if(flag==1)
    begin
    if(i==32'd10000)
    begin
    i<=32'b0;
    state<=S0;
    casez(state)
      S0:
         begin
         R_seven_led<=unit;
         R_led_con<=8'b1111_1110;
         state<=S1;
         end
      S1:
         begin
         R_seven_led<=ten;
         R_led_con<=8'b1111_1101;
         state<=S0;
         end
      default:
         state<=S0;
    endcase
    end
    else
    i<=i+32'b1;
    end
    else
    R_led_con<=8'b1111_1111;
         
function [7:0] display;
  input [3:0] j;
  casez(j)
    0: display=8'b0000_0011;
    1: display=8'b1001_1111;
    2: display=8'b0010_0101;
    3: display=8'b0000_1101;
    4: display=8'b1001_1001;
    5: display=8'b0100_1001;
    6: display=8'b0100_0001;
    7: display=8'b0001_1111;
    8: display=8'b0000_0001;
    9: display=8'b0000_1001;
   10: display=8'b1111_1110;
    default: display=8'bz;
  endcase
endfunction

endmodule
         
*************************************************************************************************************
正确的篮球24秒
*************************************************************************************************************

module countball(clk,start,reset,clear,led,seven_led,led_con);
  input clk,start,reset,clear;
  output led;
  output [7:0] seven_led,led_con;
  reg [7:0] seven_led,led_con;
  reg led;
  reg [8:0] shu;
  wire [7:0] tens;
  wire [7:0] units;
  reg [31:0] i;
  reg [31:0] j;

  assign tens=display(shu/8'd10);
  assign units=display(shu%8'd10);  

  parameter S0=2'b00,S1=2'b01;
  reg [2:0] state; 

  always@(posedge clk or negedge reset)
  if(!reset)
  begin
  shu<=0;
  i<=32'b0;
  led<=0;
  end
  else if(clear==0)
  begin
  shu<=8'd24;
  led<=0;
  end
  else if(start==0)
  begin
  if(i==32'd60000000)
  begin
  i<=32'b0;
  shu<=shu-8'b1;
  end
  else if(shu==0)
  begin
  led<=1;
  shu<=8'd0;
  end
  else 
  i<=i+32'b1; 
  end
  else if(start==1)
  shu<=shu;

  always@(posedge clk or negedge reset)
  if(!reset)
  begin
  j<=32'b0;
  led_con<=8'b1111_1111;
  end
  else if(j==10000)
  begin
  j<=32'b0;
  state<=S0;
    casez(state)
      S0:
         begin
         seven_led<=units;
         led_con<=8'b1111_1110;
         state<=S1;
         end
      S1:
         begin
         seven_led<=tens;
         led_con<=8'b1111_1101;
         state<=S0;
         end
      default:
         state<=S0;
    endcase
  end
  else 
  j<=j+1;

function [7:0] display;
  input [3:0] j;
  casez(j)
    0: display=8'b0000_0011;
    1: display=8'b1001_1111;
    2: display=8'b0010_0101;
    3: display=8'b0000_1101;
    4: display=8'b1001_1001;
    5: display=8'b0100_1001;
    6: display=8'b0100_0001;
    7: display=8'b0001_1111;
    8: display=8'b0000_0001;
    9: display=8'b0000_1001;
   10: display=8'b1111_1110;
    default: display=8'bz;
  endcase
endfunction  

endmodule