📄 urat.sim_ori.vwf

📁 VHDL语言编写的全功能串口模块（包含DTR
💻 VWF
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{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 4246512.471;
		LEVEL 1 FOR 3380000.0;
		LEVEL 0 FOR 416000.0;
		LEVEL 1 FOR 416000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 2496000.0;
		LEVEL 0 FOR 1300000.0;
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 416000.0;
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 3796000.0;
		LEVEL 0 FOR 1248000.0;
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 4628000.0;
		LEVEL 0 FOR 416000.0;
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 3380000.0;
		NODE
		{
			REPEAT = 2;
			LEVEL 0 FOR 416000.0;
			LEVEL 1 FOR 832000.0;
		}
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 3380000.0;
		LEVEL 0 FOR 416000.0;
		LEVEL 1 FOR 416000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 832000.0;
		LEVEL 1 FOR 55505487.529;
	}
}

TRANSITION_LIST("state_tras[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3414512.471;
		NODE
		{
			REPEAT = 6;
			LEVEL 1 FOR 3328000.0;
			LEVEL 0 FOR 3380000.0;
		}
		LEVEL 1 FOR 3328000.0;
		LEVEL 0 FOR 53009487.529;
	}
}

TRANSITION_LIST("state_tras[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1750512.471;
		NODE
		{
			REPEAT = 6;
			LEVEL 1 FOR 1664000.0;
			LEVEL 0 FOR 1664000.0;
			LEVEL 1 FOR 1664000.0;
			LEVEL 0 FOR 1716000.0;
		}
		LEVEL 1 FOR 1664000.0;
		LEVEL 0 FOR 1664000.0;
		LEVEL 1 FOR 1664000.0;
		LEVEL 0 FOR 53009487.529;
	}
}

TRANSITION_LIST("state_tras[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 918512.471;
		NODE
		{
			REPEAT = 6;
			NODE
			{
				REPEAT = 3;
				LEVEL 1 FOR 832000.0;
				LEVEL 0 FOR 832000.0;
			}
			LEVEL 1 FOR 832000.0;
			LEVEL 0 FOR 884000.0;
		}
		NODE
		{
			REPEAT = 3;
			LEVEL 1 FOR 832000.0;
			LEVEL 0 FOR 832000.0;
		}
		LEVEL 1 FOR 832000.0;
		LEVEL 0 FOR 53009487.529;
	}
}

TRANSITION_LIST("state_tras[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 502512.471;
		NODE
		{
			REPEAT = 6;
			NODE
			{
				REPEAT = 7;
				LEVEL 1 FOR 416000.0;
				LEVEL 0 FOR 416000.0;
			}
			LEVEL 1 FOR 416000.0;
			LEVEL 0 FOR 468000.0;
		}
		NODE
		{
			REPEAT = 7;
			LEVEL 1 FOR 416000.0;
			LEVEL 0 FOR 416000.0;
		}
		LEVEL 1 FOR 416000.0;
		LEVEL 0 FOR 53009487.529;
	}
}

TRANSITION_LIST("trasstart")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 86512.471;
		NODE
		{
			REPEAT = 6;
			LEVEL 1 FOR 6656000.0;
			LEVEL 0 FOR 52000.0;
		}
		LEVEL 1 FOR 6656000.0;
		LEVEL 0 FOR 53009487.529;
	}
}

DISPLAY_LINE
{
	CHANNEL = "clk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "key_input";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 1;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "rst";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 2;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "rxd";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 3;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "txd";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "en";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "clkout";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "out_data";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 7;
	TREE_LEVEL = 0;
	CHILDREN = 8, 9, 10, 11, 12, 13, 14, 15;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 13;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "out_data[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 16;
	TREE_LEVEL = 0;
	CHILDREN = 17, 18, 19, 20, 21, 22, 23, 24;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 23;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div_reg[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 24;
	TREE_LEVEL = 1;
	PARENT = 16;
}

DISPLAY_LINE
{
	CHANNEL = "div8_tras_reg";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 25;
	TREE_LEVEL = 0;
	CHILDREN = 26, 27, 28;
}

DISPLAY_LINE
{
	CHANNEL = "div8_tras_reg[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 26;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "div8_tras_reg[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 27;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "div8_tras_reg[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 28;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "send_state";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 29;
	TREE_LEVEL = 0;
	CHILDREN = 30, 31, 32;
}

DISPLAY_LINE
{
	CHANNEL = "send_state[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 30;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "send_state[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 31;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "send_state[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 32;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 33;
	TREE_LEVEL = 0;
	CHILDREN = 34, 35, 36, 37, 38, 39, 40, 41;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 34;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 35;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 36;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 37;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 38;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 39;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 40;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "txd_buf[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 41;
	TREE_LEVEL = 1;
	PARENT = 33;
}

DISPLAY_LINE
{
	CHANNEL = "state_tras";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 42;
	TREE_LEVEL = 0;
	CHILDREN = 43, 44, 45, 46;
}

DISPLAY_LINE
{
	CHANNEL = "state_tras[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 43;
	TREE_LEVEL = 1;
	PARENT = 42;
}

DISPLAY_LINE
{
	CHANNEL = "state_tras[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 44;
	TREE_LEVEL = 1;
	PARENT = 42;
}

DISPLAY_LINE
{
	CHANNEL = "state_tras[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 45;
	TREE_LEVEL = 1;
	PARENT = 42;
}

DISPLAY_LINE
{
	CHANNEL = "state_tras[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 46;
	TREE_LEVEL = 1;
	PARENT = 42;
}

DISPLAY_LINE
{
	CHANNEL = "trasstart";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 47;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 11225;
	MASTER = TRUE;
}
;
上一页 1 23
💿 文件大小 219 K
👤 上传用户 yuyx2003
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#VHDL #DTR #语言 #编写
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