📄 q_reg.pin
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-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (2.5 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (2.5 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "q_reg" ASSIGNED TO AN EPF10K30ETC144-1
TCK : 1
CONF_DONE : 2
nCEO : 3
TDO : 4
VCCIO : 5
VCCINT : 6
f20 : 7
qs0 : 8
q2 : 9
q1 : 10
q15 : 11
q14 : 12
q0 : 13
q12 : 14
GND : 15
GND : 16
f215 : 17
q13 : 18
q5 : 19
q4 : 20
q6 : 21
q3 : 22
f25 : 23
VCCIO : 24
VCCINT : 25
RESERVED : 26
qs15 : 27
RESERVED : 28
RESERVED : 29
f28 : 30
q11 : 31
q10 : 32
q8 : 33
TMS : 34
nSTATUS : 35
f11 : 36
f19 : 37
f13 : 38
f110 : 39
GND : 40
f214 : 41
f211 : 42
dest_ctl3 : 43
f213 : 44
VCCIO : 45
f111 : 46
RESERVED : 47
q7 : 48
dest_ctl1 : 49
GND : 50
f12 : 51
VCCINT : 52
VCCINT : 53
rst : 54
clk : 55
load : 56
GND : 57
GND : 58
RESERVED : 59
RESERVED : 60
VCCIO : 61
RESERVED : 62
RESERVED : 63
RESERVED : 64
RESERVED : 65
GND : 66
RESERVED : 67
RESERVED : 68
RESERVED : 69
RESERVED : 70
VCCIO : 71
RESERVED : 72
RESERVED : 73
nCONFIG : 74
VCCINT : 75
MSEL1 : 76
MSEL0 : 77
f29 : 78
f18 : 79
qs_7 : 80
f27 : 81
f210 : 82
RESERVED : 83
GND : 84
GND : 85
qs7 : 86
RESERVED : 87
f15 : 88
f14 : 89
f24 : 90
f23 : 91
f26 : 92
VCCINT : 93
VCCIO : 94
f114 : 95
f212 : 96
qs_15 : 97
f22 : 98
f21 : 99
RESERVED : 100
RESERVED : 101
qs_0 : 102
GND : 103
GND : 104
TDI : 105
nCE : 106
DCLK : 107
DATA0 : 108
RESERVED : 109
RESERVED : 110
RESERVED : 111
RESERVED : 112
RESERVED : 113
RESERVED : 114
VCCIO : 115
RESERVED : 116
RESERVED : 117
RESERVED : 118
RESERVED : 119
RESERVED : 120
RESERVED : 121
RESERVED : 122
VCCINT : 123
w_ctl : 124
f17 : 125
dest_ctl0 : 126
GND : 127
RESERVED : 128
GND : 129
f113 : 130
q9 : 131
RESERVED : 132
RESERVED : 133
VCCIO : 134
f16 : 135
RESERVED : 136
RESERVED : 137
RESERVED : 138
GND : 139
f112 : 140
RESERVED : 141
dest_ctl2 : 142
f115 : 143
f10 : 144
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