src_op.rpt

组成原理的大作业

_LC1_C36 = LCELL( _EQ023);
  _EQ023 =  _LC5_C36 & !_LC8_B2
         #  _LC8_B2 &  q15;

-- Node name is ':371' 
-- Equation name is '_LC4_C36', type is buried 
_LC4_C36 = LCELL( _EQ024);
  _EQ024 =  ad14 &  _LC5_B2
         #  bd14 & !_LC7_B2;

-- Node name is ':374' 
-- Equation name is '_LC3_C36', type is buried 
_LC3_C36 = LCELL( _EQ025);
  _EQ025 =  _LC4_C36 & !_LC8_B2
         #  _LC8_B2 &  q14;

-- Node name is ':383' 
-- Equation name is '_LC4_E10', type is buried 
_LC4_E10 = LCELL( _EQ026);
  _EQ026 =  ad13 &  _LC5_B2
         #  bd13 & !_LC7_B2;

-- Node name is ':386' 
-- Equation name is '_LC8_E10', type is buried 
_LC8_E10 = LCELL( _EQ027);
  _EQ027 =  _LC4_E10 & !_LC8_B2
         #  _LC8_B2 &  q13;

-- Node name is ':395' 
-- Equation name is '_LC4_A27', type is buried 
_LC4_A27 = LCELL( _EQ028);
  _EQ028 =  ad12 &  _LC5_B2
         #  bd12 & !_LC7_B2;

-- Node name is ':398' 
-- Equation name is '_LC6_E10', type is buried 
_LC6_E10 = LCELL( _EQ029);
  _EQ029 =  _LC4_A27 & !_LC8_B2
         #  _LC8_B2 &  q12;

-- Node name is ':407' 
-- Equation name is '_LC8_A27', type is buried 
_LC8_A27 = LCELL( _EQ030);
  _EQ030 =  ad11 &  _LC5_B2
         #  bd11 & !_LC7_B2;

-- Node name is ':410' 
-- Equation name is '_LC1_A27', type is buried 
_LC1_A27 = LCELL( _EQ031);
  _EQ031 =  _LC8_A27 & !_LC8_B2
         #  _LC8_B2 &  q11;

-- Node name is ':419' 
-- Equation name is '_LC7_F8', type is buried 
_LC7_F8  = LCELL( _EQ032);
  _EQ032 =  ad10 &  _LC5_B2
         #  bd10 & !_LC7_B2;

-- Node name is ':422' 
-- Equation name is '_LC1_F8', type is buried 
_LC1_F8  = LCELL( _EQ033);
  _EQ033 =  _LC7_F8 & !_LC8_B2
         #  _LC8_B2 &  q10;

-- Node name is ':431' 
-- Equation name is '_LC5_C24', type is buried 
_LC5_C24 = LCELL( _EQ034);
  _EQ034 =  ad9 &  _LC5_B2
         #  bd9 & !_LC7_B2;

-- Node name is ':434' 
-- Equation name is '_LC1_C24', type is buried 
_LC1_C24 = LCELL( _EQ035);
  _EQ035 =  _LC5_C24 & !_LC8_B2
         #  _LC8_B2 &  q9;

-- Node name is ':443' 
-- Equation name is '_LC6_A27', type is buried 
_LC6_A27 = LCELL( _EQ036);
  _EQ036 =  ad8 &  _LC5_B2
         #  bd8 & !_LC7_B2;

-- Node name is ':446' 
-- Equation name is '_LC3_A27', type is buried 
_LC3_A27 = LCELL( _EQ037);
  _EQ037 =  _LC6_A27 & !_LC8_B2
         #  _LC8_B2 &  q8;

-- Node name is ':455' 
-- Equation name is '_LC6_F8', type is buried 
_LC6_F8  = LCELL( _EQ038);
  _EQ038 =  ad7 &  _LC5_B2
         #  bd7 & !_LC7_B2;

-- Node name is ':458' 
-- Equation name is '_LC2_E10', type is buried 
_LC2_E10 = LCELL( _EQ039);
  _EQ039 =  _LC6_F8 & !_LC8_B2
         #  _LC8_B2 &  q7;

-- Node name is ':467' 
-- Equation name is '_LC5_F8', type is buried 
_LC5_F8  = LCELL( _EQ040);
  _EQ040 =  ad6 &  _LC5_B2
         #  bd6 & !_LC7_B2;

-- Node name is ':470' 
-- Equation name is '_LC2_F8', type is buried 
_LC2_F8  = LCELL( _EQ041);
  _EQ041 =  _LC5_F8 & !_LC8_B2
         #  _LC8_B2 &  q6;

-- Node name is ':479' 
-- Equation name is '_LC5_D7', type is buried 
_LC5_D7  = LCELL( _EQ042);
  _EQ042 =  ad5 &  _LC5_B2
         #  bd5 & !_LC7_B2;

-- Node name is ':482' 
-- Equation name is '_LC7_E10', type is buried 
_LC7_E10 = LCELL( _EQ043);
  _EQ043 =  _LC5_D7 & !_LC8_B2
         #  _LC8_B2 &  q5;

-- Node name is ':491' 
-- Equation name is '_LC7_D7', type is buried 
_LC7_D7  = LCELL( _EQ044);
  _EQ044 =  ad4 &  _LC5_B2
         #  bd4 & !_LC7_B2;

-- Node name is ':494' 
-- Equation name is '_LC8_D7', type is buried 
_LC8_D7  = LCELL( _EQ045);
  _EQ045 =  _LC7_D7 & !_LC8_B2
         #  _LC8_B2 &  q4;

-- Node name is ':503' 
-- Equation name is '_LC2_D7', type is buried 
_LC2_D7  = LCELL( _EQ046);
  _EQ046 =  ad3 &  _LC5_B2
         #  bd3 & !_LC7_B2;

-- Node name is ':506' 
-- Equation name is '_LC1_D7', type is buried 
_LC1_D7  = LCELL( _EQ047);
  _EQ047 =  _LC2_D7 & !_LC8_B2
         #  _LC8_B2 &  q3;

-- Node name is ':515' 
-- Equation name is '_LC1_B2', type is buried 
_LC1_B2  = LCELL( _EQ048);
  _EQ048 =  ad2 &  _LC5_B2
         #  bd2 & !_LC7_B2;

-- Node name is ':518' 
-- Equation name is '_LC1_E10', type is buried 
_LC1_E10 = LCELL( _EQ049);
  _EQ049 =  _LC1_B2 & !_LC8_B2
         #  _LC8_B2 &  q2;

-- Node name is ':527' 
-- Equation name is '_LC4_C24', type is buried 
_LC4_C24 = LCELL( _EQ050);
  _EQ050 =  ad1 &  _LC5_B2
         #  bd1 & !_LC7_B2;

-- Node name is ':530' 
-- Equation name is '_LC7_C24', type is buried 
_LC7_C24 = LCELL( _EQ051);
  _EQ051 =  _LC4_C24 & !_LC8_B2
         #  _LC8_B2 &  q1;

-- Node name is ':539' 
-- Equation name is '_LC3_C24', type is buried 
_LC3_C24 = LCELL( _EQ052);
  _EQ052 =  ad0 &  _LC5_B2
         #  bd0 & !_LC7_B2;

-- Node name is ':542' 
-- Equation name is '_LC2_C24', type is buried 
_LC2_C24 = LCELL( _EQ053);
  _EQ053 =  _LC3_C24 & !_LC8_B2
         #  _LC8_B2 &  q0;



Project Information                              e:\max2work\运算器\src_op.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10KE' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:01
   Fitter                                 00:00:02
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:01
   --------------------------             --------
   Total Time                             00:00:04


Memory Allocated
-----------------

Peak memory allocated during compilation  = 24,146K