q_reg.vhd

组成原理的大作业

---------------------------------------------------------------------------
---------------------------------------------------------------------------
--组原 Group 6;
--Q寄存器:Q_REG；
--主要用于移位运算和乘除结果的存储;
----------------------------------------------------------------------------
----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use work.myconstantlibrary.all;

entity q_reg is

port(
		w_ctl			: 	in std_logic;  	--字/字节控制信号
      	clk,rst,load 	: 	in std_logic;	--寄存器控制信号:时钟,清零,加载;
      	f1 				: 	in std_logic_vector(15 downto 0);	--数据输入;
		f2 				: 	in std_logic_vector(15 downto 0);	--数据输入;
      	dest_ctl 		: 	in std_logic_vector(3 downto 0);	--数据选择控制信号;
		qs_0,qs_7,qs_15	:	in std_logic;
      	qs0,qs7,qs15 	: 	out std_logic;					
      	q 				: 	buffer std_logic_vector(15 downto 0)	--寄存器当前值;
     );

end q_reg;

architecture archq_reg of q_reg is

	signal data : std_logic_vector(15 downto 0);

begin
  	--由输出控制信号决定将要放入Q寄存器的数据;
	data<=	f1(14 downto 0) & qs_0 when (dest_ctl=ramqu and w_ctl='1') else
			"00000000" & f1(6 downto 0) & qs_0 when (dest_ctl=ramqu and w_ctl='0') else 
			qs_15 & f1(15 downto 1) when (dest_ctl=ramqd and w_ctl='1') else
			"00000000"& qs_7 &f1(7 downto 1) when (dest_ctl=ramqd and w_ctl='0') else 
			f1 when (dest_ctl=qreg and w_ctl='1') else
			"0000000" & f1(7 downto 0) when (dest_ctl=qreg and w_ctl='0')else
			f2 when (dest_ctl=ramq and w_ctl='1') else
			"0000000" & f2(7 downto 0) when (dest_ctl=ramq and w_ctl='0')
			else "0000000000000000";
	qs15<=	f1(15) 	when (w_ctl='1' and (dest_ctl=ramu or dest_ctl=ramqu)) else 'Z';
	qs7	<=	f1(7) 	when (w_ctl='0'and (dest_ctl=ramu or dest_ctl=ramqu)) else 'Z';
	qs0 <=	f1(0)  	when (dest_ctl=ramd or dest_ctl=ramqd) else 'Z';

    load_data:  process (rst, clk,load)		--Q寄存器根据时钟等信号进行数据存储
		         begin
	               if rst='1' then			--Q寄存器清零
	                   q <= (others=>'0');
	               elsif (clk'event and clk='1') then	--在时钟的上升沿有