prev_cmp_sram4m.tan.qmsg

Altera cyclone ep1c6对sram idt71系列的读写时序控制

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "bt835_field " "Info: Assuming node \"bt835_field\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 11 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "bt835_vactive " "Info: Assuming node \"bt835_vactive\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 15 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "bt835_vreset " "Info: Assuming node \"bt835_vreset\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 13 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "bt835_hactive " "Info: Assuming node \"bt835_hactive\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 14 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "bt835_hreset " "Info: Assuming node \"bt835_hreset\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 12 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0 "" 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "6 " "Warning: Found 6 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_GATED_CLK" "we_2~9 " "Info: Detected gated clock \"we_2~9\" as buffer" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 24 -1 0 } } { "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "we_2~9" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "dio_2\[0\]~45 " "Info: Detected gated clock \"dio_2\[0\]~45\" as buffer" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 -1 0 } } { "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "dio_2\[0\]~45" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "dio_1\[0\]~49 " "Info: Detected gated clock \"dio_1\[0\]~49\" as buffer" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 -1 0 } } { "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "dio_1\[0\]~49" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "bt860_data\[6\]~667 " "Info: Detected gated clock \"bt860_data\[6\]~667\" as buffer" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 37 -1 0 } } { "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "bt860_data\[6\]~667" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "res1~1 " "Info: Detected gated clock \"res1~1\" as buffer" {  } { { "sram4m.vhd" "" { Text "D:/sram4m/sram4m.vhd" 34 -1 0 } } { "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "res1~1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_GATED_CLK" "process0~1 " "Info: Detected gated clock \"process0~1\" as buffer" {  } { { "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/program files/altera/quartus7.2/quartus/bin/Assignment Editor.qase" 1 { { 0 "process0~1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0}