sram4m.sim.rpt

Altera cyclone ep1c6对sram idt71系列的读写时序控制

; |sram4m|adr_2[16]      ; |sram4m|adr_2[16]           ; padio            ;
; |sram4m|adr_2[17]      ; |sram4m|adr_2[17]           ; padio            ;
; |sram4m|adr_2[18]      ; |sram4m|adr_2[18]           ; padio            ;
; |sram4m|bt835_field    ; |sram4m|bt835_field~corein  ; combout          ;
; |sram4m|bt835_vreset   ; |sram4m|bt835_vreset~corein ; combout          ;
+------------------------+-----------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                 ;
+------------------------+------------------------------+------------------+
; Node Name              ; Output Port Name             ; Output Port Type ;
+------------------------+------------------------------+------------------+
; |sram4m|Add0~47        ; |sram4m|Add0~48              ; cout0            ;
; |sram4m|Add0~47        ; |sram4m|Add0~48COUT1         ; cout1            ;
; |sram4m|Add0~51        ; |sram4m|Add0~52              ; cout0            ;
; |sram4m|Add0~51        ; |sram4m|Add0~52COUT1         ; cout1            ;
; |sram4m|Add0~55        ; |sram4m|Add0~56              ; cout0            ;
; |sram4m|Add0~55        ; |sram4m|Add0~56COUT1         ; cout1            ;
; |sram4m|Add0~59        ; |sram4m|Add0~60              ; cout0            ;
; |sram4m|Add0~59        ; |sram4m|Add0~60COUT1         ; cout1            ;
; |sram4m|Add1~170       ; |sram4m|Add1~171             ; cout0            ;
; |sram4m|Add1~170       ; |sram4m|Add1~171COUT1        ; cout1            ;
; |sram4m|Add1~176       ; |sram4m|Add1~177             ; cout0            ;
; |sram4m|Add1~176       ; |sram4m|Add1~177COUT1        ; cout1            ;
; |sram4m|Add1~179       ; |sram4m|Add1~179             ; combout          ;
; |sram4m|Add1~181       ; |sram4m|Add1~181             ; combout          ;
; |sram4m|Add1~181       ; |sram4m|Add1~182             ; cout0            ;
; |sram4m|Add1~181       ; |sram4m|Add1~182COUT1        ; cout1            ;
; |sram4m|Add1~183       ; |sram4m|Add1~183             ; combout          ;
; |sram4m|Add1~183       ; |sram4m|Add1~184COUT1        ; cout1            ;
; |sram4m|Add1~185       ; |sram4m|Add1~185             ; combout          ;
; |sram4m|res1~1         ; |sram4m|res1~1               ; combout          ;
; |sram4m|addr1[7]~32    ; |sram4m|addr1[7]~32          ; combout          ;
; |sram4m|addr1[16]~11   ; |sram4m|addr1[16]~11         ; combout          ;
; |sram4m|addr1[15]~1328 ; |sram4m|addr1[15]~1328       ; combout          ;
; |sram4m|addr1[16]~1329 ; |sram4m|addr1[16]~1329       ; combout          ;
; |sram4m|addr1[17]~1330 ; |sram4m|addr1[17]~1330       ; combout          ;
; |sram4m|addr1[18]~1331 ; |sram4m|addr1[18]~1331       ; combout          ;
; |sram4m|process1~80    ; |sram4m|process1~80          ; combout          ;
; |sram4m|Equal1~73      ; |sram4m|Equal1~73            ; combout          ;
; |sram4m|Equal1~74      ; |sram4m|Equal1~74            ; combout          ;
; |sram4m|dio_1[0]~49    ; |sram4m|dio_1[0]~49          ; combout          ;
; |sram4m|Equal1~75      ; |sram4m|Equal1~75            ; combout          ;
; |sram4m|addr1[17]~1345 ; |sram4m|addr1[17]~1345       ; combout          ;
; |sram4m|addr1[18]~1346 ; |sram4m|addr1[18]~1346       ; combout          ;
; |sram4m|addr1[15]~1349 ; |sram4m|addr1[15]~1349       ; combout          ;
; |sram4m|addr1[16]~1350 ; |sram4m|addr1[16]~1350       ; combout          ;
; |sram4m|res1           ; |sram4m|res1                 ; combout          ;
; |sram4m|dio_1[0]       ; |sram4m|dio_1[0]~16          ; combout          ;
; |sram4m|dio_1[0]       ; |sram4m|dio_1[0]~output      ; padio            ;
; |sram4m|dio_1[1]       ; |sram4m|dio_1[1]~15          ; combout          ;
; |sram4m|dio_1[1]       ; |sram4m|dio_1[1]~output      ; padio            ;
; |sram4m|dio_1[2]       ; |sram4m|dio_1[2]~14          ; combout          ;
; |sram4m|dio_1[2]       ; |sram4m|dio_1[2]~output      ; padio            ;
; |sram4m|dio_1[3]       ; |sram4m|dio_1[3]~13          ; combout          ;
; |sram4m|dio_1[3]       ; |sram4m|dio_1[3]~output      ; padio            ;
; |sram4m|dio_1[4]       ; |sram4m|dio_1[4]~12          ; combout          ;
; |sram4m|dio_1[4]       ; |sram4m|dio_1[4]~output      ; padio            ;
; |sram4m|dio_1[5]       ; |sram4m|dio_1[5]~11          ; combout          ;
; |sram4m|dio_1[5]       ; |sram4m|dio_1[5]~output      ; padio            ;
; |sram4m|dio_1[6]       ; |sram4m|dio_1[6]~10          ; combout          ;
; |sram4m|dio_1[6]       ; |sram4m|dio_1[6]~output      ; padio            ;
; |sram4m|dio_1[7]       ; |sram4m|dio_1[7]~9           ; combout          ;
; |sram4m|dio_1[7]       ; |sram4m|dio_1[7]~output      ; padio            ;
; |sram4m|flash_cle      ; |sram4m|flash_cle            ; padio            ;
; |sram4m|flash_ale      ; |sram4m|flash_ale            ; padio            ;
; |sram4m|flash_ce       ; |sram4m|flash_ce             ; padio            ;
; |sram4m|flash_we       ; |sram4m|flash_we             ; padio            ;
; |sram4m|flash_re       ; |sram4m|flash_re             ; padio            ;
; |sram4m|flash_wp       ; |sram4m|flash_wp             ; padio            ;
; |sram4m|cs_1           ; |sram4m|cs_1                 ; padio            ;
; |sram4m|we_1           ; |sram4m|we_1                 ; padio            ;
; |sram4m|oe_1           ; |sram4m|oe_1                 ; padio            ;
; |sram4m|oe_2           ; |sram4m|oe_2                 ; padio            ;
; |sram4m|cs_2           ; |sram4m|cs_2                 ; padio            ;
; |sram4m|adr_1[10]      ; |sram4m|adr_1[10]            ; padio            ;
; |sram4m|adr_2[0]       ; |sram4m|adr_2[0]             ; padio            ;
; |sram4m|adr_2[1]       ; |sram4m|adr_2[1]             ; padio            ;
; |sram4m|adr_2[2]       ; |sram4m|adr_2[2]             ; padio            ;
; |sram4m|adr_2[3]       ; |sram4m|adr_2[3]             ; padio            ;
; |sram4m|adr_2[4]       ; |sram4m|adr_2[4]             ; padio            ;
; |sram4m|adr_2[5]       ; |sram4m|adr_2[5]             ; padio            ;
; |sram4m|adr_2[6]       ; |sram4m|adr_2[6]             ; padio            ;
; |sram4m|adr_2[7]       ; |sram4m|adr_2[7]             ; padio            ;
; |sram4m|adr_2[8]       ; |sram4m|adr_2[8]             ; padio            ;
; |sram4m|adr_2[9]       ; |sram4m|adr_2[9]             ; padio            ;
; |sram4m|adr_2[10]      ; |sram4m|adr_2[10]            ; padio            ;
; |sram4m|adr_2[11]      ; |sram4m|adr_2[11]            ; padio            ;
; |sram4m|adr_2[12]      ; |sram4m|adr_2[12]            ; padio            ;
; |sram4m|adr_2[13]      ; |sram4m|adr_2[13]            ; padio            ;
; |sram4m|adr_2[14]      ; |sram4m|adr_2[14]            ; padio            ;
; |sram4m|adr_2[15]      ; |sram4m|adr_2[15]            ; padio            ;
; |sram4m|adr_2[16]      ; |sram4m|adr_2[16]            ; padio            ;
; |sram4m|adr_2[17]      ; |sram4m|adr_2[17]            ; padio            ;
; |sram4m|adr_2[18]      ; |sram4m|adr_2[18]            ; padio            ;
; |sram4m|bt835_field    ; |sram4m|bt835_field~corein   ; combout          ;
; |sram4m|bt835_vactive  ; |sram4m|bt835_vactive~corein ; combout          ;
+------------------------+------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Mon Oct 20 16:19:39 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off sram4m -c sram4m
Info: Using vector source file "D:/sram4m/sram4m.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Warning: Found glitch at time 8.92 ns of duration 0.12 ns on node "|sram4m|dio_2[7]$latch"
Warning: Found glitch at time 9.0 ns of duration 0.2 ns on node "|sram4m|dio_2[6]$latch"
Warning: Found glitch at time 112008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]$latch"
Warning: Found glitch at time 112008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]$latch"
Warning: Found glitch at time 112009.03 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]$latch"
Warning: Found glitch at time 112011.96 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]"
Warning: Found glitch at time 112011.97 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]"
Warning: Found glitch at time 112012.68 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]"
Warning: Found glitch at time 176008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]$latch"
Warning: Found glitch at time 176008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]$latch"
Warning: Found glitch at time 176009.03 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]$latch"
Warning: Found glitch at time 176011.96 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]"
Warning: Found glitch at time 176011.97 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]"
Warning: Found glitch at time 176012.68 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]"
Warning: Found glitch at time 240008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]$latch"
Warning: Found glitch at time 240008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]$latch"
Warning: Found glitch at time 240009.03 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]$latch"
Warning: Found glitch at time 240011.96 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]"
Warning: Found glitch at time 240011.97 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]"
Warning: Found glitch at time 240012.68 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]"
Warning: Found glitch at time 304008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]$latch"
Warning: Found glitch at time 304008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]$latch"
Warning: Found glitch at time 304009.03 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]$latch"
Warning: Found glitch at time 304011.96 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]"
Warning: Found glitch at time 304011.97 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]"
Warning: Found glitch at time 304012.68 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]"
Warning: Found glitch at time 368008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]$latch"
Warning: Found glitch at time 368008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]$latch"
Warning: Found glitch at time 368009.03 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]$latch"
Warning: Found glitch at time 368011.96 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]"
Warning: Found glitch at time 368011.97 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]"
Warning: Found glitch at time 368012.68 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]"
Warning: Found glitch at time 432008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]$latch"
Warning: Found glitch at time 432008.75 ns of duration 0.64 ns on node "|sram4m|bt860_data[5]$latch"
Warning: Found glitch at time 432009.03 ns of duration 0.92 ns on node "|sram4m|bt860_data[1]$latch"
Warning: Found glitch at time 432011.96 ns of duration 0.64 ns on node "|sram4m|bt860_data[4]"