dds.tan.rpt

来自「这是一个用vhdl语言实现dds的例子」· RPT 代码 · 共 221 行 · 第 1/5 页

; Slack                                   ; Actual fmax (period)                                ; From                                                                                                       ; To                                                                                                         ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg0 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg1 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg2 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg3 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg4 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg5 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg6 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg7 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[0]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg0 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg1 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg2 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg3 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg4 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg5 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg6 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg7 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[1]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg0 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg1 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg2 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg3 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg4 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg5 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg6 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg7 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[2]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg0 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg1 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg2 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg3 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg4 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg5 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg6 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg7 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg0 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg1 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg2 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg3 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg4 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg5 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg6 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg7 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[4]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg0 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[5]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg1 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[5]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 180.05 MHz ( period = 5.554 ns )      ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|ram_block1a0~porta_address_reg2 ; rom01:inst1|altsyncram:altsyncram_component|altsyncram_t431:auto_generated|q_a[5]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;