adc_0820.vho

使用VHDL语言描述AD0809芯片功能

-- atom is at CLKCTRL_G3
\reset~clkctrl\ : cycloneii_clkctrl
-- pragma translate_off
-- GENERIC MAP (
--	clock_type => "global clock",
--	ena_register_mode => "falling edge")
-- pragma translate_on
PORT MAP (
	ena => VCC,
	inclk => \reset~clkctrl_INCLK_bus\,
	clkselect => GNDs(1 DOWNTO 0),
	modesel => \reset~clkctrl_modesel\,
	outclk => \reset~clkctrl_outclk\);

-- atom is at LCFF_X1_Y8_N11
\now_state.st0\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \now_state.st0~feeder_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st0~regout\);

-- atom is at LCCOMB_X1_Y8_N18
\now_state.st1~6\ : cycloneii_lcell_comb
-- Equation(s):
-- \now_state.st1~6_combout\ = !\now_state.st0~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "0000000011111111",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \now_state.st1~6_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => VCC,
	datad => \now_state.st0~regout\,
	cin => GND,
	modesel => \now_state.st1~6_modesel\,
	combout => \now_state.st1~6_combout\);

-- atom is at LCFF_X1_Y8_N19
\now_state.st1\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \now_state.st1~6_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st1~regout\);

-- atom is at LCCOMB_X1_Y8_N26
\wr_bar~feeder\ : cycloneii_lcell_comb
-- Equation(s):
-- \wr_bar~feeder_combout\ = \now_state.st1~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111100000000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \wr_bar~feeder_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => VCC,
	datad => \now_state.st1~regout\,
	cin => GND,
	modesel => \wr_bar~feeder_modesel\,
	combout => \wr_bar~feeder_combout\);

-- atom is at LCFF_X1_Y8_N27
wr_bar : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \wr_bar~feeder_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \wr_bar~regout\);

-- atom is at LCCOMB_X1_Y8_N22
\now_state.st3~feeder\ : cycloneii_lcell_comb
-- Equation(s):
-- \now_state.st3~feeder_combout\ = \wr_bar~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111100000000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \now_state.st3~feeder_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => VCC,
	datad => \wr_bar~regout\,
	cin => GND,
	modesel => \now_state.st3~feeder_modesel\,
	combout => \now_state.st3~feeder_combout\);

-- atom is at LCFF_X1_Y8_N23
\now_state.st3\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \now_state.st3~feeder_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st3~regout\);

-- atom is at LCCOMB_X1_Y8_N0
\now_state.st4~feeder\ : cycloneii_lcell_comb
-- Equation(s):
-- \now_state.st4~feeder_combout\ = \now_state.st3~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111100000000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \now_state.st4~feeder_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => VCC,
	datad => \now_state.st3~regout\,
	cin => GND,
	modesel => \now_state.st4~feeder_modesel\,
	combout => \now_state.st4~feeder_combout\);

-- atom is at LCFF_X1_Y8_N1
\now_state.st4\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \now_state.st4~feeder_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st4~regout\);

-- atom is at LCCOMB_X1_Y8_N6
\now_state.st5~feeder\ : cycloneii_lcell_comb
-- Equation(s):
-- \now_state.st5~feeder_combout\ = \now_state.st4~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111100000000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \now_state.st5~feeder_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => VCC,
	datad => \now_state.st4~regout\,
	cin => GND,
	modesel => \now_state.st5~feeder_modesel\,
	combout => \now_state.st5~feeder_combout\);

-- atom is at LCFF_X1_Y8_N7
\now_state.st5\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \now_state.st5~feeder_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st5~regout\);

-- atom is at LCCOMB_X1_Y8_N2
\Selector0~8\ : cycloneii_lcell_comb
-- Equation(s):
-- \Selector0~8_combout\ = \now_state.st5~regout\ # \int_bar~combout\ & \now_state.st6~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111110100000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \Selector0~8_pathsel\,
	dataa => \int_bar~combout\,
	datab => VCC,
	datac => \now_state.st6~regout\,
	datad => \now_state.st5~regout\,
	cin => GND,
	modesel => \Selector0~8_modesel\,
	combout => \Selector0~8_combout\);

-- atom is at LCFF_X1_Y8_N3
\now_state.st6\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \Selector0~8_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st6~regout\);

-- atom is at LCCOMB_X1_Y8_N4
\now_state~34\ : cycloneii_lcell_comb
-- Equation(s):
-- \now_state~34_combout\ = !\int_bar~combout\ & \now_state.st6~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "0101010100000000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \now_state~34_pathsel\,
	dataa => \int_bar~combout\,
	datab => VCC,
	datac => VCC,
	datad => \now_state.st6~regout\,
	cin => GND,
	modesel => \now_state~34_modesel\,
	combout => \now_state~34_combout\);

-- atom is at LCFF_X1_Y8_N5
\now_state.st7\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \now_state~34_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \now_state.st7~regout\);

-- atom is at LCCOMB_X1_Y8_N20
\rd_bar~0\ : cycloneii_lcell_comb
-- Equation(s):
-- \rd_bar~0_combout\ = \now_state.st7~regout\ # \now_state.st6~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111111110000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \rd_bar~0_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => \now_state.st7~regout\,
	datad => \now_state.st6~regout\,
	cin => GND,
	modesel => \rd_bar~0_modesel\,
	combout => \rd_bar~0_combout\);

-- atom is at LCFF_X1_Y8_N21
\rd_bar~reg0\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \rd_bar~0_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \rd_bar~reg0_regout\);

-- atom is at LCCOMB_X1_Y8_N12
\lock~32\ : cycloneii_lcell_comb
-- Equation(s):
-- \lock~32_combout\ = \lock~reg0_regout\ # \now_state.st7~regout\

-- pragma translate_off
-- GENERIC MAP (
--	lut_mask => "1111111111110000",
--	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	pathsel => \lock~32_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => \lock~reg0_regout\,
	datad => \now_state.st7~regout\,
	cin => GND,
	modesel => \lock~32_modesel\,
	combout => \lock~32_combout\);

-- atom is at LCFF_X1_Y8_N13
\lock~reg0\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk_state~clkctrl_outclk\,
	datain => \lock~32_combout\,
	sdata => GND,
	aclr => \reset~clkctrl_outclk\,
	sclr => GND,
	sload => GND,
	ena => VCC,
	regout => \lock~reg0_regout\);

-- atom is at PIN_34
\wr_rdy~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	input_async_reset => "none",
--	input_power_up => "low",
--	input_register_mode => "none",
--	input_sync_reset => "none",
--	oe_async_reset => "none",
--	oe_power_up => "low",
--	oe_register_mode => "none",
--	oe_sync_reset => "none",
--	operation_mode => "bidir",
--	output_async_reset => "none",
--	output_power_up => "low",
--	output_register_mode => "none",
--	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	datain => \ALT_INV_wr_bar~regout\,
	oe => VCC,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \wr_rdy~I_modesel\,
	padio => wr_rdy);

-- atom is at PIN_117
\cs_bar~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	input_async_reset => "none",
--	input_power_up => "low",
--	input_register_mode => "none",
--	input_sync_reset => "none",
--	oe_async_reset => "none",
--	oe_power_up => "low",
--	oe_register_mode => "none",
--	oe_sync_reset => "none",
--	operation_mode => "output",
--	output_async_reset => "none",
--	output_power_up => "low",
--	output_register_mode => "none",
--	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => VCC,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \cs_bar~I_modesel\,
	padio => ww_cs_bar);

-- atom is at PIN_31
\rd_bar~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	input_async_reset => "none",
--	input_power_up => "low",
--	input_register_mode => "none",
--	input_sync_reset => "none",
--	oe_async_reset => "none",
--	oe_power_up => "low",
--	oe_register_mode => "none",
--	oe_sync_reset => "none",
--	operation_mode => "output",
--	output_async_reset => "none",
--	output_power_up => "low",
--	output_register_mode => "none",
--	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	datain => \ALT_INV_rd_bar~reg0_regout\,
	oe => VCC,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \rd_bar~I_modesel\,
	padio => ww_rd_bar);

-- atom is at PIN_14
\lock~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	input_async_reset => "none",
--	input_power_up => "low",
--	input_register_mode => "none",
--	input_sync_reset => "none",
--	oe_async_reset => "none",
--	oe_power_up => "low",
--	oe_register_mode => "none",
--	oe_sync_reset => "none",
--	operation_mode => "output",
--	output_async_reset => "none",
--	output_power_up => "low",
--	output_register_mode => "none",
--	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	datain => \lock~reg0_regout\,
	oe => VCC,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \lock~I_modesel\,
	padio => ww_lock);
END structure;