alt_u_div_sve.tdf

用VHDL语言描述AD0809芯片

--alt_u_div DEVICE_FAMILY="Cyclone II" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=7 WIDTH_N=7 WIDTH_Q=7 WIDTH_R=7 denominator numerator quotient remainder
--VERSION_BEGIN 7.2 cbx_cycloneii 2007:06:13:15:47:32:SJ cbx_lpm_abs 2006:04:25:14:52:42:SJ cbx_lpm_add_sub 2007:08:06:16:01:34:SJ cbx_lpm_divide 2007:01:30:03:58:02:SJ cbx_mgl 2007:08:03:15:48:12:SJ cbx_stratix 2007:05:02:16:27:14:SJ cbx_stratixii 2007:06:28:17:26:26:SJ cbx_util_mgl 2007:06:01:06:37:30:SJ  VERSION_END


-- Copyright (C) 1991-2007 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION add_sub_lkc (dataa[0..0], datab[0..0])
RETURNS ( cout, result[0..0]);
FUNCTION add_sub_mkc (dataa[1..0], datab[1..0])
RETURNS ( cout, result[1..0]);

--synthesis_resources = lut 30 
SUBDESIGN alt_u_div_sve
( 
	den_out[6..0]	:	output;
	denominator[6..0]	:	input;
	numerator[6..0]	:	input;
	quotient[6..0]	:	output;
	remainder[6..0]	:	output;
) 
VARIABLE 
	add_sub_0 : add_sub_lkc;
	add_sub_1 : add_sub_mkc;
	add_sub_2_result_int[3..0]	:	WIRE;
	add_sub_2_cout	:	WIRE;
	add_sub_2_dataa[2..0]	:	WIRE;
	add_sub_2_datab[2..0]	:	WIRE;
	add_sub_2_result[2..0]	:	WIRE;
	add_sub_3_result_int[4..0]	:	WIRE;
	add_sub_3_cout	:	WIRE;
	add_sub_3_dataa[3..0]	:	WIRE;
	add_sub_3_datab[3..0]	:	WIRE;
	add_sub_3_result[3..0]	:	WIRE;
	add_sub_4_result_int[5..0]	:	WIRE;
	add_sub_4_cout	:	WIRE;
	add_sub_4_dataa[4..0]	:	WIRE;
	add_sub_4_datab[4..0]	:	WIRE;
	add_sub_4_result[4..0]	:	WIRE;
	add_sub_5_result_int[6..0]	:	WIRE;
	add_sub_5_cout	:	WIRE;
	add_sub_5_dataa[5..0]	:	WIRE;
	add_sub_5_datab[5..0]	:	WIRE;
	add_sub_5_result[5..0]	:	WIRE;
	add_sub_6_result_int[7..0]	:	WIRE;
	add_sub_6_cout	:	WIRE;
	add_sub_6_dataa[6..0]	:	WIRE;
	add_sub_6_datab[6..0]	:	WIRE;
	add_sub_6_result[6..0]	:	WIRE;
	DenominatorIn[63..0]	: WIRE;
	DenominatorIn_tmp[63..0]	: WIRE;
	gnd_wire	: WIRE;
	nose[55..0]	: WIRE;
	NumeratorIn[55..0]	: WIRE;
	NumeratorIn_tmp[55..0]	: WIRE;
	prestg[48..0]	: WIRE;
	quotient_tmp[6..0]	: WIRE;
	sel[55..0]	: WIRE;
	selnose[55..0]	: WIRE;
	StageIn[55..0]	: WIRE;
	StageIn_tmp[55..0]	: WIRE;
	StageOut[48..0]	: WIRE;

BEGIN 
	add_sub_0.dataa[0..0] = NumeratorIn[6..6];
	add_sub_0.datab[0..0] = DenominatorIn[0..0];
	add_sub_1.dataa[] = ( StageIn[7..7], NumeratorIn[12..12]);
	add_sub_1.datab[1..0] = DenominatorIn[9..8];
	add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]);
	add_sub_2_result[] = add_sub_2_result_int[2..0];
	add_sub_2_cout = !add_sub_2_result_int[3];
	add_sub_2_dataa[] = ( StageIn[15..14], NumeratorIn[18..18]);
	add_sub_2_datab[] = DenominatorIn[18..16];
	add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]);
	add_sub_3_result[] = add_sub_3_result_int[3..0];
	add_sub_3_cout = !add_sub_3_result_int[4];
	add_sub_3_dataa[] = ( StageIn[23..21], NumeratorIn[24..24]);
	add_sub_3_datab[] = DenominatorIn[27..24];
	add_sub_4_result_int[] = (0, add_sub_4_dataa[]) - (0, add_sub_4_datab[]);
	add_sub_4_result[] = add_sub_4_result_int[4..0];
	add_sub_4_cout = !add_sub_4_result_int[5];
	add_sub_4_dataa[] = ( StageIn[31..28], NumeratorIn[30..30]);
	add_sub_4_datab[] = DenominatorIn[36..32];
	add_sub_5_result_int[] = (0, add_sub_5_dataa[]) - (0, add_sub_5_datab[]);
	add_sub_5_result[] = add_sub_5_result_int[5..0];
	add_sub_5_cout = !add_sub_5_result_int[6];
	add_sub_5_dataa[] = ( StageIn[39..35], NumeratorIn[36..36]);
	add_sub_5_datab[] = DenominatorIn[45..40];
	add_sub_6_result_int[] = (0, add_sub_6_dataa[]) - (0, add_sub_6_datab[]);
	add_sub_6_result[] = add_sub_6_result_int[6..0];
	add_sub_6_cout = !add_sub_6_result_int[7];
	add_sub_6_dataa[] = ( StageIn[47..42], NumeratorIn[42..42]);
	add_sub_6_datab[] = DenominatorIn[54..48];
	den_out[6..0] = DenominatorIn[54..48];
	DenominatorIn[] = (gnd_wire # DenominatorIn_tmp[]);
	DenominatorIn_tmp[] = ( DenominatorIn[55..0], ( gnd_wire, denominator[]));
	gnd_wire = B"0";
	nose[] = ( B"0000000", (add_sub_6_cout # gnd_wire), B"0000000", (add_sub_5_cout # gnd_wire), B"0000000", (add_sub_4_cout # gnd_wire), B"0000000", (add_sub_3_cout # gnd_wire), B"0000000", (add_sub_2_cout # gnd_wire), B"0000000", (add_sub_1.cout # gnd_wire), B"0000000", (add_sub_0.cout # gnd_wire));
	NumeratorIn[] = (gnd_wire # NumeratorIn_tmp[]);
	NumeratorIn_tmp[] = ( NumeratorIn[48..0], numerator[]);
	prestg[] = ( add_sub_6_result[], GND, add_sub_5_result[], B"00", add_sub_4_result[], B"000", add_sub_3_result[], B"0000", add_sub_2_result[], B"00000", add_sub_1.result[], B"000000", add_sub_0.result[]);
	quotient[] = quotient_tmp[];
	quotient_tmp[] = ( (! selnose[0..0]), (! selnose[8..8]), (! selnose[16..16]), (! selnose[24..24]), (! selnose[32..32]), (! selnose[40..40]), (! selnose[48..48]));
	remainder[6..0] = StageIn[55..49];
	sel[] = ( gnd_wire, (gnd_wire # (sel[55..55] # DenominatorIn[62..62])), (gnd_wire # (sel[54..54] # DenominatorIn[61..61])), (gnd_wire # (sel[53..53] # DenominatorIn[60..60])), (gnd_wire # (sel[52..52] # DenominatorIn[59..59])), (gnd_wire # (sel[51..51] # DenominatorIn[58..58])), (gnd_wire # (sel[50..50] # DenominatorIn[57..57])), gnd_wire, (gnd_wire # (sel[48..48] # DenominatorIn[54..54])), (gnd_wire # (sel[47..47] # DenominatorIn[53..53])), (gnd_wire # (sel[46..46] # DenominatorIn[52..52])), (gnd_wire # (sel[45..45] # DenominatorIn[51..51])), (gnd_wire # (sel[44..44] # DenominatorIn[50..50])), (gnd_wire # (sel[43..43] # DenominatorIn[49..49])), gnd_wire, (gnd_wire # (sel[41..41] # DenominatorIn[46..46])), (gnd_wire # (sel[40..40] # DenominatorIn[45..45])), (gnd_wire # (sel[39..39] # DenominatorIn[44..44])), (gnd_wire # (sel[38..38] # DenominatorIn[43..43])), (gnd_wire # (sel[37..37] # DenominatorIn[42..42])), (gnd_wire # (sel[36..36] # DenominatorIn[41..41])), gnd_wire, (gnd_wire # (sel[34..34] # DenominatorIn[38..38])), (gnd_wire # (sel[33..33] # DenominatorIn[37..37])), (gnd_wire # (sel[32..32] # DenominatorIn[36..36])), (gnd_wire # (sel[31..31] # DenominatorIn[35..35])), (gnd_wire # (sel[30..30] # DenominatorIn[34..34])), (gnd_wire # (sel[29..29] # DenominatorIn[33..33])), gnd_wire, (gnd_wire # (sel[27..27] # DenominatorIn[30..30])), (gnd_wire # (sel[26..26] # DenominatorIn[29..29])), (gnd_wire # (sel[25..25] # DenominatorIn[28..28])), (gnd_wire # (sel[24..24] # DenominatorIn[27..27])), (gnd_wire # (sel[23..23] # DenominatorIn[26..26])), (gnd_wire # (sel[22..22] # DenominatorIn[25..25])), gnd_wire, (gnd_wire # (sel[20..20] # DenominatorIn[22..22])), (gnd_wire # (sel[19..19] # DenominatorIn[21..21])), (gnd_wire # (sel[18..18] # DenominatorIn[20..20])), (gnd_wire # (sel[17..17] # DenominatorIn[19..19])), (gnd_wire # (sel[16..16] # DenominatorIn[18..18])), (gnd_wire # (sel[15..15] # DenominatorIn[17..17])), gnd_wire, (gnd_wire # (sel[13..13] # DenominatorIn[14..14])), (gnd_wire # (sel[12..12] # DenominatorIn[13..13])), (gnd_wire # (sel[11..11] # DenominatorIn[12..12])), (gnd_wire # (sel[10..10] # DenominatorIn[11..11])), (gnd_wire # (sel[9..9] # DenominatorIn[10..10])), (gnd_wire # (sel[8..8] # DenominatorIn[9..9])), gnd_wire, (gnd_wire # (sel[6..6] # DenominatorIn[6..6])), (gnd_wire # (sel[5..5] # DenominatorIn[5..5])), (gnd_wire # (sel[4..4] # DenominatorIn[4..4])), (gnd_wire # (sel[3..3] # DenominatorIn[3..3])), (gnd_wire # (sel[2..2] # DenominatorIn[2..2])), (gnd_wire # (sel[1..1] # DenominatorIn[1..1])));
	selnose[] = ( ((gnd_wire # (! nose[55..55])) # sel[55..55]), ((gnd_wire # (! nose[54..54])) # sel[54..54]), ((gnd_wire # (! nose[53..53])) # sel[53..53]), ((gnd_wire # (! nose[52..52])) # sel[52..52]), ((gnd_wire # (! nose[51..51])) # sel[51..51]), ((gnd_wire # (! nose[50..50])) # sel[50..50]), ((gnd_wire # (! nose[49..49])) # sel[49..49]), ((gnd_wire # (! nose[48..48])) # sel[48..48]), ((gnd_wire # (! nose[47..47])) # sel[47..47]), ((gnd_wire # (! nose[46..46])) # sel[46..46]), ((gnd_wire # (! nose[45..45])) # sel[45..45]), ((gnd_wire # (! nose[44..44])) # sel[44..44]), ((gnd_wire # (! nose[43..43])) # sel[43..43]), ((gnd_wire # (! nose[42..42])) # sel[42..42]), ((gnd_wire # (! nose[41..41])) # sel[41..41]), ((gnd_wire # (! nose[40..40])) # sel[40..40]), ((gnd_wire # (! nose[39..39])) # sel[39..39]), ((gnd_wire # (! nose[38..38])) # sel[38..38]), ((gnd_wire # (! nose[37..37])) # sel[37..37]), ((gnd_wire # (! nose[36..36])) # sel[36..36]), ((gnd_wire # (! nose[35..35])) # sel[35..35]), ((gnd_wire # (! nose[34..34])) # sel[34..34]), ((gnd_wire # (! nose[33..33])) # sel[33..33]), ((gnd_wire # (! nose[32..32])) # sel[32..32]), ((gnd_wire # (! nose[31..31])) # sel[31..31]), ((gnd_wire # (! nose[30..30])) # sel[30..30]), ((gnd_wire # (! nose[29..29])) # sel[29..29]), ((gnd_wire # (! nose[28..28])) # sel[28..28]), ((gnd_wire # (! nose[27..27])) # sel[27..27]), ((gnd_wire # (! nose[26..26])) # sel[26..26]), ((gnd_wire # (! nose[25..25])) # sel[25..25]), ((gnd_wire # (! nose[24..24])) # sel[24..24]), ((gnd_wire # (! nose[23..23])) # sel[23..23]), ((gnd_wire # (! nose[22..22])) # sel[22..22]), ((gnd_wire # (! nose[21..21])) # sel[21..21]), ((gnd_wire # (! nose[20..20])) # sel[20..20]), ((gnd_wire # (! nose[19..19])) # sel[19..19]), ((gnd_wire # (! nose[18..18])) # sel[18..18]), ((gnd_wire # (! nose[17..17])) # sel[17..17]), ((gnd_wire # (! nose[16..16])) # sel[16..16]), ((gnd_wire # (! nose[15..15])) # sel[15..15]), ((gnd_wire # (! nose[14..14])) # sel[14..14]), ((gnd_wire # (! nose[13..13])) # sel[13..13]), ((gnd_wire # (! nose[12..12])) # sel[12..12]), ((gnd_wire # (! nose[11..11])) # sel[11..11]), ((gnd_wire # (! nose[10..10])) # sel[10..10]), ((gnd_wire # (! nose[9..9])) # sel[9..9]), ((gnd_wire # (! nose[8..8])) # sel[8..8]), ((gnd_wire # (! nose[7..7])) # sel[7..7]), ((gnd_wire # (! nose[6..6])) # sel[6..6]), ((gnd_wire # (! nose[5..5])) # sel[5..5]), ((gnd_wire # (! nose[4..4])) # sel[4..4]), ((gnd_wire # (! nose[3..3])) # sel[3..3]), ((gnd_wire # (! nose[2..2])) # sel[2..2]), ((gnd_wire # (! nose[1..1])) # sel[1..1]), ((gnd_wire # (! nose[0..0])) # sel[0..0]));
	StageIn[] = (gnd_wire # StageIn_tmp[]);
	StageIn_tmp[] = ( StageOut[48..0], B"0000000");
	StageOut[] = ( ((( StageIn[47..42], NumeratorIn[42..42]) & selnose[48..48]) # (prestg[48..42] & (! selnose[48..48]))), ((( StageIn[40..35], NumeratorIn[36..36]) & selnose[40..40]) # (prestg[41..35] & (! selnose[40..40]))), ((( StageIn[33..28], NumeratorIn[30..30]) & selnose[32..32]) # (prestg[34..28] & (! selnose[32..32]))), ((( StageIn[26..21], NumeratorIn[24..24]) & selnose[24..24]) # (prestg[27..21] & (! selnose[24..24]))), ((( StageIn[19..14], NumeratorIn[18..18]) & selnose[16..16]) # (prestg[20..14] & (! selnose[16..16]))), ((( StageIn[12..7], NumeratorIn[12..12]) & selnose[8..8]) # (prestg[13..7] & (! selnose[8..8]))), ((( StageIn[5..0], NumeratorIn[6..6]) & selnose[0..0]) # (prestg[6..0] & (! selnose[0..0]))));
END;
--VALID FILE