📄 mc13192_hw_config.lst
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ANSI-C/cC++ Compiler for HC08 V-5.0.19 (beta 0) Build 4210, Jul 29 2004
1: /**************************************************************
2: * Includes
3: **************************************************************/
4: #include "device_header.h"
5: #include "pub_def.h"
6: #include "drivers.h"
7: #include "MC13192_hw_config.h"
8: /**************************************************************
9: * Globals
10: **************************************************************/
11: extern byte rtx_mode;
12:
13: /**************************************************************
14: * Function: Initialize the MC13192 register map.
15: * Parameters: None
16: * Return: None
17: **************************************************************/
18: void MC13192_init(void)
19: {
Function: MC13192_init
Source : D:\Profiles\flr005\My Documents\Bluetooth Exchange Folder\smac 4_0\CW_IDE_3p1\smac\Sources\MC13192_hw_config.c
Options : -Cs08 -DAXM_0308 -Env"GENPATH=*D:\Profiles\flr005\My Documents\Bluetooth Exchange Folder\smac 4_0\CW_IDE_3p1\smac;D:\Profiles\flr005\My Documents\Bluetooth Exchange Folder\smac 4_0\CW_IDE_3p1\target\include;*C:\Program Files\Metrowerks\CW08 V3.1" -Env"LIBPATH=*C:\Program Files\Metrowerks\CW08 V3.1" -Env"OBJPATH=D:\Profiles\flr005\My Documents\Bluetooth Exchange Folder\smac 4_0\CW_IDE_3p1\smac\bin" -Env"TEXTPATH=D:\Profiles\flr005\My Documents\Bluetooth Exchange Folder\smac 4_0\CW_IDE_3p1\smac\bin" -Lasm=%n.lst -Ms -ObjN="D:\Profiles\flr005\My Documents\Bluetooth Exchange Folder\smac 4_0\CW_IDE_3p1\smac\smac_Data\GB60_(EVB_-_rev_A-B-C)\ObjectCode\MC13192_hw_config.c.o" -WmsgSd1106 -WmsgSd1420 -WmsgSd1801 -WmsgSd2705
20:
21: /* MC13192 v2.2 register settings */
22: drv_write_spi_1(0x1B,0x8000); /* Disable TC1. */
0000 a61b LDA #27
0002 458000 LDHX #-32768
0005 ad4c BSR L53 ;abs = 0053
23: drv_write_spi_1(0x1D,0x8000); /* Disable TC2. */
0007 a61d LDA #29
0009 ad48 BSR L53 ;abs = 0053
24: drv_write_spi_1(0x1F,0x8000); /* Disable TC3. */
000b a61f LDA #31
000d ad44 BSR L53 ;abs = 0053
25: drv_write_spi_1(0x21,0x8000); /* Disable TC4. */
000f a621 LDA #33
0011 cd0000 JSR drv_write_spi_1
26: drv_write_spi_1(0x07,0x0E00); /* Enable CLKo in Doze */
0014 a607 LDA #7
0016 450e00 LDHX #3584
0019 cd0000 JSR drv_write_spi_1
27: drv_write_spi_1(0x0C,0x0300); /* IRQ pull-up disable. */
001c a60c LDA #12
001e 450300 LDHX #768
0021 cd0000 JSR drv_write_spi_1
28: drv_read_spi_1(0x25); /* Sets the reset indicator bit */
0024 a625 LDA #37
0026 cd0000 JSR drv_read_spi_1
29: drv_write_spi_1(0x04,0xA08D); /* LR ADDED New cal value */
0029 a604 LDA #4
002b 45a08d LDHX #-24435
002e cd0000 JSR drv_write_spi_1
30: drv_write_spi_1(0x08,0xFFF7); /* Preferred injection */
0031 a608 LDA #8
0033 45fff7 LDHX #-9
0036 cd0000 JSR drv_write_spi_1
31: drv_write_spi_1(0x05,0x8351); /* Acoma, TC1, Doze, ATTN masks, LO1, CRC */
0039 a605 LDA #5
003b 458351 LDHX #-31919
003e cd0000 JSR drv_write_spi_1
32: drv_write_spi_1(0x06,0x4720); /* CCA, TX, RX, energy detect */
0041 a606 LDA #6
0043 454720 LDHX #18208
0046 cd0000 JSR drv_write_spi_1
33:
34: /* Read the status register to clear any undesired IRQs. */
35: drv_read_spi_1(0x24); /* Clear the status register, if set */
0049 a624 LDA #36
004b cd0000 JSR drv_read_spi_1
36: rtx_mode = IDLE_MODE; /* Update global to reflect MC13192 status */
004e 4f CLRA
004f c70000 STA rtx_mode
37:
38: }
0052 81 RTS
0053 L53:
0053 cd0000 JSR drv_write_spi_1
0056 5f CLRX
0057 a680 LDA #-128
0059 87 PSHA
005a 8a PULH
005b 81 RTS
39:
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