smac_13192sard_3_0.lst

在飞思卡尔MC9S08GB60单片机环境下实现了无线监控

Units and locations in library 'D:\master5.15\smac\bin\SMAC_13192sard_3_0.lib'
Unit name                                                                    size     from       to
D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\MC13192_hw_config.c.o      3748    24577    28325
D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o               13912       57    13969
D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o         10608    13969    24577
D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o            10424    28325    38749
D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o            15556    38749    54305

EXPORTED OBJECTS
AssertRTXEN                      F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
AssertRTXEN                      I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
DeAssertRTXEN                    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
DeAssertRTXEN                    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
Firmware_Database_Label          O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
Freescale_Copyright              O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MC13192_cont_reset               F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
MC13192_init                     F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\MC13192_hw_config.c.o)
MC13192_restart                  F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
MCPS_data_indication             I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
MCPS_data_request                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_MC13192_FE_gain_adjust      F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_MC13192_PA_output_adjust    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_MC13192_reset_indication    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
MLME_MC13192_soft_reset          F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_MC13192_xtal_adjust         F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_RX_disable_request          F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_RX_enable_request           F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_doze_request                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_energy_detect               F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_get_rfic_version            F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_hibernate_request           F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_link_quality                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_set_MC13192_clock_rate      F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_set_MC13192_tmr_prescale    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_set_channel_request         F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
MLME_wake_request                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_MC13192_FE_gain_adjust      I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_MC13192_FE_gain_adjust      F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_MC13192_PA_output_adjust    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_MC13192_PA_output_adjust    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_MC13192_reset_indication    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_MC13192_reset_indication    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
PLME_MC13192_soft_reset          F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_MC13192_soft_reset          I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_MC13192_xtal_adjust         F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_MC13192_xtal_adjust         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_disable_MC13192_timer1      F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_disable_MC13192_timer1      I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_doze_request                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_doze_request                I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_enable_MC13192_timer1       I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_enable_MC13192_timer1       F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_energy_detect               I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_energy_detect               F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_get_rfic_version            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_get_rfic_version            F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_get_time_request            F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_get_time_request            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_hibernate_request           F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_hibernate_request           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_link_quality                I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_link_quality                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_set_MC13192_clock_rate      F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_set_MC13192_clock_rate      I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_set_MC13192_tmr_prescale    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_set_MC13192_tmr_prescale    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_set_channel_request         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_set_channel_request         F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_set_time_request            F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_set_trx_state_request       F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_set_trx_state_request       I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
PLME_wake_request                F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
PLME_wake_request                I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
SMAC_Version                     O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
SPHY_Version                     O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
WaitSPI_transfer_done            F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
Wake_MC13192                     F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
Wake_MC13192                     I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_COPY                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_ICGC1                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_ICGC2                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_ICGS1                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_ICMP                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
_IRQSC                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
_IRQSC                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_Jump_Table_Addr                 I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_Jump_Table_Header_Addr          I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_Jump_Table_Header_Offset        I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_Jump_Table_Offset               I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_LADD                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
_LLSL                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_LOR                             I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_POP32                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
_POP32                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
_PTCD                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_PTCD                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
_PTCDD                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_PTCPE                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_PTED                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
_PTED                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_PTEDD                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_SOPT                            I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_SPI1BR                          I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_SPI1C1                          I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_SPI1C2                          I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_SPI1D                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
_SPI1S                           I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
_TPM1CNT                         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
_TPM1SC                          I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
disable_MC13192_interrupts       F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_cca_reading                  O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_read_rx_ram                  I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
drv_read_rx_ram                  F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_read_spi_1                   I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\MC13192_hw_config.c.o)
drv_read_spi_1                   I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
drv_read_spi_1                   I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
drv_read_spi_1                   F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_rx_packet                    O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_rx_packet                    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
drv_rx_packet                    I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
drv_write_spi_1                  F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_write_spi_1                  I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
drv_write_spi_1                  I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\MC13192_hw_config.c.o)
drv_write_tx_ram                 F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
drv_write_tx_ram                 I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
init_gpio                        F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
irq_isr                          F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
irq_value                        O   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
mcu_init                         F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
pd_data_indication               I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
pd_data_indication               F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
pd_data_request                  F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
pd_data_request                  I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_mac.c.o)
restore_MC13192_interrupts       F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
rtx_mode                         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\simple_phy.c.o)
rtx_mode                         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
rtx_mode                         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\drivers.c.o)
rtx_mode                         I   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\MC13192_hw_config.c.o)
use_external_clock               F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)
use_mcu_clock                    F   (D:\master5.15\smac\smac_Data\13192SARD\ObjectCode\mcu_hw_config.c.o)