crc16bits.map.eqn

16bit crc encoder ande demo

--A1L65 is i75~9
A1L65_p1_out = EN & crc_in[6];
A1L65_or_out = A1L65_p1_out;
A1L65 = A1L65_or_out;


--A1L75 is i76~9
A1L75_p1_out = EN & crc_in[5];
A1L75_or_out = A1L75_p1_out;
A1L75 = A1L75_or_out;


--A1L85 is i77~9
A1L85_p1_out = EN & crc_in[4];
A1L85_or_out = A1L85_p1_out;
A1L85 = A1L85_or_out;


--A1L95 is i78~9
A1L95_p1_out = EN & crc_in[3];
A1L95_or_out = A1L95_p1_out;
A1L95 = A1L95_or_out;


--A1L06 is i79~9
A1L06_p1_out = EN & crc_in[2];
A1L06_or_out = A1L06_p1_out;
A1L06 = A1L06_or_out;


--A1L2 is EN~1
A1L2_or_out = !EN;
A1L2 = A1L2_or_out;


--A1L16 is i80~12
A1L16_p1_out = EN & !data_in[7] & crc_in[15] & !crc_in[1];
A1L16_p2_out = EN & data_in[7] & !crc_in[15] & !crc_in[1];
A1L16_p3_out = EN & !data_in[7] & !crc_in[15] & crc_in[1];
A1L16_p4_out = EN & data_in[7] & crc_in[15] & crc_in[1];
A1L16_or_out = A1L16_p1_out # A1L16_p2_out # A1L16_p3_out # A1L16_p4_out;
A1L16 = A1L16_or_out;


--A1L46 is i82~8
A1L46_p1_out = EN & !crc_in[13];
A1L46_p0_out = data_in[6] & !crc_in[14] & data_in[5] & EN;
A1L46_p2_out = !data_in[6] & !crc_in[14] & !data_in[5] & EN;
A1L46_p3_out = data_in[6] & crc_in[14] & !data_in[5] & EN;
A1L46_p4_out = !data_in[6] & crc_in[14] & data_in[5] & EN;
A1L46_or_out = A1L46_p0_out # A1L46_p2_out # A1L46_p3_out # A1L46_p4_out;
A1L46 = A1L46_p1_out $ A1L46_or_out;


--A1L56 is i83~8
A1L56_p1_out = EN & !crc_in[13];
A1L56_p0_out = crc_in[12] & !data_in[4] & data_in[5] & EN;
A1L56_p2_out = !crc_in[12] & !data_in[4] & !data_in[5] & EN;
A1L56_p3_out = crc_in[12] & data_in[4] & !data_in[5] & EN;
A1L56_p4_out = !crc_in[12] & data_in[4] & data_in[5] & EN;
A1L56_or_out = A1L56_p0_out # A1L56_p2_out # A1L56_p3_out # A1L56_p4_out;
A1L56 = A1L56_p1_out $ A1L56_or_out;


--A1L66 is i84~8
A1L66_p1_out = EN & !crc_in[12];
A1L66_p0_out = crc_in[11] & !data_in[3] & data_in[4] & EN;
A1L66_p2_out = !crc_in[11] & !data_in[3] & !data_in[4] & EN;
A1L66_p3_out = crc_in[11] & data_in[3] & !data_in[4] & EN;
A1L66_p4_out = !crc_in[11] & data_in[3] & data_in[4] & EN;
A1L66_or_out = A1L66_p0_out # A1L66_p2_out # A1L66_p3_out # A1L66_p4_out;
A1L66 = A1L66_p1_out $ A1L66_or_out;


--A1L96 is i87~8
A1L96_p1_out = EN & !data_in[0];
A1L96_p0_out = data_in[1] & !crc_in[9] & crc_in[8] & EN;
A1L96_p2_out = !data_in[1] & !crc_in[9] & !crc_in[8] & EN;
A1L96_p3_out = data_in[1] & crc_in[9] & !crc_in[8] & EN;
A1L96_p4_out = !data_in[1] & crc_in[9] & crc_in[8] & EN;
A1L96_or_out = A1L96_p0_out # A1L96_p2_out # A1L96_p3_out # A1L96_p4_out;
A1L96 = A1L96_p1_out $ A1L96_or_out;


--A1L26 is i81~94
A1L26_p1_out = EN & !data_in[6];
A1L26_p0_out = crc_in[0] & !data_in[7] & crc_in[15] & !crc_in[14] & EN;
A1L26_p2_out = crc_in[0] & data_in[7] & crc_in[15] & crc_in[14] & EN;
A1L26_p3_out = crc_in[0] & !data_in[7] & !crc_in[15] & crc_in[14] & EN;
A1L26_p4_out = crc_in[0] & data_in[7] & !crc_in[15] & !crc_in[14] & EN;
A1L26_or_out = A1L36 # A1L26_p0_out # A1L26_p2_out # A1L26_p3_out # A1L26_p4_out;
A1L26 = A1L26_p1_out $ A1L26_or_out;


--A1L76 is i85~8
A1L76_p1_out = EN & !crc_in[11];
A1L76_p0_out = data_in[2] & crc_in[10] & !data_in[3] & EN;
A1L76_p2_out = !data_in[2] & crc_in[10] & data_in[3] & EN;
A1L76_p3_out = !data_in[2] & !crc_in[10] & !data_in[3] & EN;
A1L76_p4_out = data_in[2] & !crc_in[10] & data_in[3] & EN;
A1L76_or_out = A1L76_p0_out # A1L76_p2_out # A1L76_p3_out # A1L76_p4_out;
A1L76 = A1L76_p1_out $ A1L76_or_out;


--A1L86 is i86~8
A1L86_p1_out = EN & crc_in[10];
A1L86_p0_out = data_in[1] & !crc_in[9] & !data_in[2] & EN;
A1L86_p2_out = !data_in[1] & !crc_in[9] & data_in[2] & EN;
A1L86_p3_out = data_in[1] & crc_in[9] & data_in[2] & EN;
A1L86_p4_out = !data_in[1] & crc_in[9] & !data_in[2] & EN;
A1L86_or_out = A1L86_p0_out # A1L86_p2_out # A1L86_p3_out # A1L86_p4_out;
A1L86 = A1L86_p1_out $ A1L86_or_out;


--A1L15 is i38~8
A1L15_p2_out = crc_in[9] & !data_in[1];
A1L15_p3_out = !crc_in[9] & data_in[1];
A1L15_or_out = A1L15_p2_out # A1L15_p3_out;
A1L15 = data_in[2] $ A1L15_or_out;


--A1L45 is i54~73
A1L45_p0_out = data_in[6] & !crc_in[14] & crc_in[15];
A1L45_p2_out = !data_in[6] & !crc_in[14] & !crc_in[15];
A1L45_p3_out = data_in[6] & crc_in[14] & !crc_in[15];
A1L45_p4_out = !data_in[6] & crc_in[14] & crc_in[15];
A1L45_or_out = A1L45_p0_out # A1L45_p2_out # A1L45_p3_out # A1L45_p4_out;
A1L45 = !data_in[7] $ A1L45_or_out;


--A1L35 is i47~3
A1L35_p0_out = crc_in[12] & !data_in[4] & data_in[5];
A1L35_p2_out = !crc_in[12] & !data_in[4] & !data_in[5];
A1L35_p3_out = crc_in[12] & data_in[4] & !data_in[5];
A1L35_p4_out = !crc_in[12] & data_in[4] & data_in[5];
A1L35_or_out = A1L35_p0_out # A1L35_p2_out # A1L35_p3_out # A1L35_p4_out;
A1L35 = !crc_in[13] $ A1L35_or_out;


--A1L25 is i41~3
A1L25_p2_out = data_in[3] & !crc_in[11];
A1L25_p3_out = !data_in[3] & crc_in[11];
A1L25_or_out = A1L25_p2_out # A1L25_p3_out;
A1L25 = crc_in[10] $ A1L25_or_out;


--A1L07 is i88~8
A1L07_p1_out = EN & !A1L25;
A1L07_p0_out = A1L15 & !A1L45 & A1L35 & EN;
A1L07_p2_out = !A1L15 & !A1L45 & !A1L35 & EN;
A1L07_p3_out = !A1L15 & A1L45 & A1L35 & EN;
A1L07_p4_out = A1L15 & A1L45 & !A1L35 & EN;
A1L07_or_out = A1L07_p0_out # A1L07_p2_out # A1L07_p3_out # A1L07_p4_out;
A1L07 = A1L07_p1_out $ A1L07_or_out;


--A1L64 is i32~8
A1L64 = EXP(data_in[2] & !crc_in[9] & !data_in[1]);


--A1L74 is i32~9
A1L74 = EXP(data_in[2] & crc_in[9] & data_in[1]);


--A1L84 is i32~10
A1L84 = EXP(!data_in[2] & crc_in[9] & !data_in[1]);


--A1L94 is i32~11
A1L94 = EXP(!data_in[2] & !crc_in[9] & data_in[1]);


--A1L05 is i32~12
A1L05_p1_out = A1L64 & A1L74 & A1L84 & A1L94;
A1L05_p0_out = A1L45 & A1L35 & A1L25;
A1L05_p2_out = !A1L45 & A1L35 & !A1L25;
A1L05_p3_out = A1L45 & !A1L35 & !A1L25;
A1L05_p4_out = !A1L45 & !A1L35 & A1L25;
A1L05_or_out = A1L05_p0_out # A1L05_p2_out # A1L05_p3_out # A1L05_p4_out;
A1L05 = A1L05_p1_out $ A1L05_or_out;


--A1L17 is i89~13
A1L17_p1_out = EN & !data_in[0] & crc_in[8] & A1L05;
A1L17_p2_out = EN & data_in[0] & !crc_in[8] & A1L05;
A1L17_p3_out = EN & !data_in[0] & !crc_in[8] & !A1L05;
A1L17_p4_out = EN & data_in[0] & crc_in[8] & !A1L05;
A1L17_or_out = A1L17_p1_out # A1L17_p2_out # A1L17_p3_out # A1L17_p4_out;
A1L17 = A1L17_or_out;


--A1L55 is i74~8
A1L55_p1_out = EN & crc_in[7];
A1L55_p0_out = !A1L05 & crc_in[8] & data_in[0] & EN;
A1L55_p2_out = A1L05 & crc_in[8] & !data_in[0] & EN;
A1L55_p3_out = A1L05 & !crc_in[8] & data_in[0] & EN;
A1L55_p4_out = !A1L05 & !crc_in[8] & !data_in[0] & EN;
A1L55_or_out = A1L55_p0_out # A1L55_p2_out # A1L55_p3_out # A1L55_p4_out;
A1L55 = A1L55_p1_out $ A1L55_or_out;


--A1L36 is i81~101
A1L36_p1_out = !crc_in[0] & !data_in[7] & crc_in[15] & crc_in[14] & EN;
A1L36_p2_out = !crc_in[0] & data_in[7] & !crc_in[15] & crc_in[14] & EN;
A1L36_p3_out = !crc_in[0] & !data_in[7] & !crc_in[15] & !crc_in[14] & EN;
A1L36_p4_out = !crc_in[0] & data_in[7] & crc_in[15] & !crc_in[14] & EN;
A1L36 = A1L36_p1_out # A1L36_p2_out # A1L36_p3_out # A1L36_p4_out;


--EN is EN
--operation mode is input

EN = INPUT();


--crc_in[15] is crc_in[15]
--operation mode is input

crc_in[15] = INPUT();


--crc_in[14] is crc_in[14]
--operation mode is input

crc_in[14] = INPUT();


--crc_in[13] is crc_in[13]
--operation mode is input

crc_in[13] = INPUT();


--crc_in[12] is crc_in[12]
--operation mode is input

crc_in[12] = INPUT();


--crc_in[11] is crc_in[11]
--operation mode is input

crc_in[11] = INPUT();


--crc_in[10] is crc_in[10]
--operation mode is input

crc_in[10] = INPUT();


--crc_in[9] is crc_in[9]
--operation mode is input

crc_in[9] = INPUT();


--crc_in[8] is crc_in[8]
--operation mode is input

crc_in[8] = INPUT();


--crc_in[7] is crc_in[7]
--operation mode is input

crc_in[7] = INPUT();


--crc_in[6] is crc_in[6]
--operation mode is input

crc_in[6] = INPUT();


--crc_in[5] is crc_in[5]
--operation mode is input

crc_in[5] = INPUT();


--crc_in[4] is crc_in[4]
--operation mode is input

crc_in[4] = INPUT();


--crc_in[3] is crc_in[3]
--operation mode is input

crc_in[3] = INPUT();


--crc_in[2] is crc_in[2]
--operation mode is input

crc_in[2] = INPUT();


--crc_in[1] is crc_in[1]
--operation mode is input

crc_in[1] = INPUT();


--crc_in[0] is crc_in[0]
--operation mode is input

crc_in[0] = INPUT();


--data_in[7] is data_in[7]
--operation mode is input

data_in[7] = INPUT();


--data_in[6] is data_in[6]
--operation mode is input

data_in[6] = INPUT();


--data_in[5] is data_in[5]
--operation mode is input

data_in[5] = INPUT();


--data_in[4] is data_in[4]
--operation mode is input

data_in[4] = INPUT();


--data_in[3] is data_in[3]
--operation mode is input

data_in[3] = INPUT();


--data_in[2] is data_in[2]
--operation mode is input

data_in[2] = INPUT();


--data_in[1] is data_in[1]
--operation mode is input

data_in[1] = INPUT();


--data_in[0] is data_in[0]
--operation mode is input

data_in[0] = INPUT();


--crc_out[14] is crc_out[14]
--operation mode is output

crc_out[14] = OUTPUT(A1L65);


--crc_out[13] is crc_out[13]
--operation mode is output

crc_out[13] = OUTPUT(A1L75);


--crc_out[12] is crc_out[12]
--operation mode is output

crc_out[12] = OUTPUT(A1L85);


--crc_out[11] is crc_out[11]
--operation mode is output

crc_out[11] = OUTPUT(A1L95);


--crc_out[10] is crc_out[10]
--operation mode is output

crc_out[10] = OUTPUT(A1L06);


--valid is valid
--operation mode is output

valid = OUTPUT(A1L2);


--crc_out[9] is crc_out[9]
--operation mode is output

crc_out[9] = OUTPUT(A1L16);


--crc_out[7] is crc_out[7]
--operation mode is output

crc_out[7] = OUTPUT(A1L46);


--crc_out[6] is crc_out[6]
--operation mode is output

crc_out[6] = OUTPUT(A1L56);


--crc_out[5] is crc_out[5]
--operation mode is output

crc_out[5] = OUTPUT(A1L66);


--crc_out[2] is crc_out[2]
--operation mode is output

crc_out[2] = OUTPUT(A1L96);


--crc_out[8] is crc_out[8]
--operation mode is output

crc_out[8] = OUTPUT(A1L26);


--crc_out[4] is crc_out[4]
--operation mode is output

crc_out[4] = OUTPUT(A1L76);


--crc_out[3] is crc_out[3]
--operation mode is output

crc_out[3] = OUTPUT(A1L86);


--crc_out[1] is crc_out[1]
--operation mode is output

crc_out[1] = OUTPUT(A1L07);


--crc_out[0] is crc_out[0]
--operation mode is output

crc_out[0] = OUTPUT(A1L17);


--crc_out[15] is crc_out[15]
--operation mode is output

crc_out[15] = OUTPUT(A1L55);