mc8051_top.ncf

这是一个基于xilinx平台的8051处理器文件

#
# Constraints generated by Synplify Pro 8.6.2, Build 027R
#

# Period Constraints

#Begin clock constraints
NET "clk" TNM_NET = "clk"; 
TIMESPEC "TS_clk" = PERIOD "clk" 2.967 ns HIGH 50.00%; 
NET "i_mc8051_clockdiv/s_clk_pre_c" TNM_NET = "i_mc8051_clockdiv_s_clk_pre_c"; 
TIMESPEC "TS_i_mc8051_clockdiv_s_clk_pre_c" = PERIOD "i_mc8051_clockdiv_s_clk_pre_c" 59.000 ns HIGH 50.00%; 
#End clock constraints

# Output Constraints
# Input Constraints

# I/O Registers Packing Constraints
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_int1_h1[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_int0_h1[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[7]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p1[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[7]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p0[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[7]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p3[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[7]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/s_p2[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p0[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[0]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[1]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[2]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[3]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[4]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[5]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[6]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p1[7]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p2[7]" IOB=FALSE;
INST "i_mc8051_core/i_mc8051_control/i_control_mem/p3[7]" IOB=FALSE;

# I/O Registers Packing Constraints
INST "i_mc8051_core/gen_mc8051_siu.0.i_mc8051_siu/rxdwr_o" IOB=FALSE;
INST "i_mc8051_core/gen_mc8051_siu.0.i_mc8051_siu/rxd_o" IOB=FALSE;
INST "i_mc8051_core/gen_mc8051_siu.0.i_mc8051_siu/s_rxd_ff0" IOB=FALSE;

# I/O Registers Packing Constraints
INST "i_mc8051_core/gen_mc8051_tmrctr.0.i_mc8051_tmrctr/s_int1_sync[0]" IOB=FALSE;
INST "i_mc8051_core/gen_mc8051_tmrctr.0.i_mc8051_tmrctr/s_int0_sync[0]" IOB=FALSE;
INST "i_mc8051_core/gen_mc8051_tmrctr.0.i_mc8051_tmrctr/s_t0ff0" IOB=FALSE;
INST "i_mc8051_core/gen_mc8051_tmrctr.0.i_mc8051_tmrctr/s_t1ff0" IOB=FALSE;

# Location Constraints

# End of generated constraints