📄 flift_srr.htm
字号:
Clock
---------------------------------------------------------------------------------------------------------------------------------------
STOPLIGHT_1[4] FLIFT|Q_derived_clock[0] cyclone_lcell_ff dataa STOPLIGHT_0_sqmuxa_3_i_0 999.963 994.387
DOWNLIGHT[4:1] FLIFT|Q_derived_clock[0] Port DOWNLIGHT[2] DOWNLIGHT[2] 998.000 994.644
DOWNLIGHT[4:1] FLIFT|Q_derived_clock[0] Port DOWNLIGHT[3] DOWNLIGHT[3] 998.000 994.644
DOWNLIGHT[4:1] FLIFT|Q_derived_clock[0] Port DOWNLIGHT[4] DOWNLIGHT[4] 998.000 994.644
STOPLIGHT[4:1] FLIFT|Q_derived_clock[0] Port STOPLIGHT[1] STOPLIGHT[1] 998.000 994.644
STOPLIGHT[4:1] FLIFT|Q_derived_clock[0] Port STOPLIGHT[2] STOPLIGHT[2] 998.000 994.644
STOPLIGHT[4:1] FLIFT|Q_derived_clock[0] Port STOPLIGHT[3] STOPLIGHT[3] 998.000 994.644
STOPLIGHT[4:1] FLIFT|Q_derived_clock[0] Port STOPLIGHT[4] STOPLIGHT[4] 998.000 994.644
UPLIGHT[4:1] FLIFT|Q_derived_clock[0] Port UPLIGHT[1] UPLIGHT[1] 998.000 994.644
UPLIGHT[4:1] FLIFT|Q_derived_clock[0] Port UPLIGHT[2] UPLIGHT[2] 998.000 994.644
=======================================================================================================================================
<a name=worstPaths59>Worst Path Information
<a href="E:\My Synplyfy\lift\rev_2\flift.srr:fp:22917:24201:@XP_NAMES">View Worst Path in Analyst</a>
***********************
Path information for path number 1:
Requested Period: 1000.000
- Setup time: 0.037
= Required time: 999.963
- Propagation time: 3.576
- User constraint on starting point: 2.000
= Slack (critical) : 994.387
Number of logic level(s): 3
Starting point: STOP1 / STOP1
Ending point: STOPLIGHT_1[4] / dataa
The start point is clocked by FLIFT|Q_derived_clock[0] [rising]
The end point is clocked by FLIFT|Q_derived_clock[0] [rising] on pin clk
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
---------------------------------------------------------------------------------------------------------
STOP1 Port STOP1 In 0.000 2.000 -
STOP1 Net - - 0.000 - 1
STOP1_in cyclone_io padio In - 2.000 -
STOP1_in cyclone_io combout Out 1.475 3.475 -
STOP1_c Net - - 0.842 - 7
STOPLIGHT_0_sqmuxa_3_i_0_a2 cyclone_lcell datac In - 4.317 -
STOPLIGHT_0_sqmuxa_3_i_0_a2 cyclone_lcell combout Out 0.292 4.609 -
STOPLIGHT_0_sqmuxa_3_i_0_a2 Net - - 0.356 - 2
STOPLIGHT_0_sqmuxa_3_i_0 cyclone_lcell datac In - 4.965 -
STOPLIGHT_0_sqmuxa_3_i_0 cyclone_lcell combout Out 0.292 5.257 -
STOPLIGHT_0_sqmuxa_3_i_0 Net - - 0.319 - 1
STOPLIGHT_1[4] cyclone_lcell_ff dataa In - 5.576 -
=========================================================================================================
Total path delay (propagation time + setup) of 3.613 is 2.096(58.0%) logic and 1.517(42.0%) route.
====================================
<a name=clockReport60>Detailed Report for Clock: FLIFT|Q_derived_clock[3]
====================================
<a name=startingSlack61>Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
-----------------------------------------------------------------------------------------------------------------
RST FLIFT|Q_derived_clock[3] Port RST RST 2.000 994.495
POSITION[0] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout POSITIONz[0] 0.224 994.531
POSITION[1] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout POSITIONz[1] 0.224 994.550
POSITION[2] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout POSITIONz[2] 0.224 994.569
UDSIG FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout UDSIGz 0.224 994.626
DOORLIGHT FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout DOORLIGHTz 0.224 994.644
STATE[0] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout STATE[0] 0.224 996.161
STATE[1] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout STATE[1] 0.224 996.252
CONT.pos[1] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout CONT.pos[1] 0.224 997.104
STATE[2] FLIFT|Q_derived_clock[3] cyclone_lcell_ff regout STATE[2] 0.224 997.262
=================================================================================================================
<a name=endingSlack62>Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------------------------------
CONT.pos[0] FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
CONT.pos[1] FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
CONT.pos[2] FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
DOORLIGHT FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
POSITION[0] FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
POSITION[1] FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
POSITION[2] FLIFT|Q_derived_clock[3] cyclone_lcell_ff ena RST_c_i_i 999.096 994.495
POSITION[2:0] FLIFT|Q_derived_clock[3] Port POSITION[0] POSITION[0] 998.000 994.531
POSITION[2:0] FLIFT|Q_derived_clock[3] Port POSITION[1] POSITION[1] 998.000 994.550
POSITION[2:0] FLIFT|Q_derived_clock[3] Port POSITION[2] POSITION[2] 998.000 994.569
========================================================================================================================
<a name=worstPaths63>Worst Path Information
<a href="E:\My Synplyfy\lift\rev_2\flift.srr:fp:29289:30135:@XP_NAMES">View Worst Path in Analyst</a>
***********************
Path information for path number 1:
Requested Period: 1000.000
- Setup time: 0.904
= Required time: 999.096
- Propagation time: 2.601
- User constraint on starting point: 2.000
= Slack (non-critical) : 994.495
Number of logic level(s): 2
Starting point: RST / RST
Ending point: CONT.pos[0] / ena
The start point is clocked by FLIFT|Q_derived_clock[3] [rising]
The end point is clocked by FLIFT|Q_derived_clock[3] [rising] on pin clk
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
--------------------------------------------------------------------------------------------
RST Port RST In 0.000 2.000 -
RST Net - - 0.000 - 1
RST_in cyclone_io padio In - 2.000 -
RST_in cyclone_io combout Out 1.475 3.475 -
RST_c Net - - 0.000 - 27(22)
RST_c_i_i inv I[0] In - 3.475 -
RST_c_i_i inv OUT[0] Out 0.000 3.475 -
RST_c_i_i Net - - 1.126 - 7(22)
CONT.pos[0] cyclone_lcell_ff ena In - 4.601 -
============================================================================================
Total path delay (propagation time + setup) of 3.505 is 2.379(67.9%) logic and 1.126(32.1%) route.
Fanout format: logic fanout (physical fanout)
##### END OF TIMING REPORT #####]
<a name=areaReport64>##### START OF AREA REPORT #####[
Design view:work.FLIFT(behav)
Selecting part EP1C3T144C8
@N:<a href="@N:FA174:@XP_HELP">FA174</a> : <!@TM:1216018008> | The following device usage report estimates place and route data. Please look at the place and route report for final resource usage..
I/O ATOMs: 27
Total LUTs: 78 of 2910 ( 2%)
Logic resources: 78 ATOMs of 2910 ( 2%)
ATOM count by mode:
normal: 78
arithmetic: 0
ShiftTap: 0 (0 registers)
Total ESB: 0 bits (0% of 53248)
ATOMs using regout pin: 27
also using enable pin: 7
also using combout pin: 0
ATOMs using combout pin: 51
Number of Inputs on ATOMs: 316
Number of Nets: 14784
##### END OF AREA REPORT #####]
Mapper successful!
Process took 0h:00m:03s realtime, 0h:00m:03s cputime
# Mon Jul 14 14:46:47 2008
###########################################################]
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -